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SC417EVB

10A Integrated FET Regulator with Programmable LDO

Semtech Corporation 

SC417/SC427

Applications Information (continued)

The inductor value is typically selected to provide a ripple

current that is between 25% to 50% of the maximum load

current. This provides an optimal trade-off between cost,

efficiency, and transient performance.

During the DH on-time, voltage across the inductor is (V

IN

- V ). The equation for determining inductance is shown

OUT

next.

L (VIN  VOUT ) u TON

IRIPPLE

Example

In this example, the inductor ripple current is set equal to

50% of the maximum load current. Thus ripple current

will be 50% x 10A or 5A. To find the minimum inductance

needed, use the V and T values that correspond to

IN

ON

V.

INMAX

L (13.2  1.05) u 318ns 0.77PH

5A

A slightly larger value of 0.88μH is selected. This will

decrease the maximum IRIPPLE to 4.4A.

Note that the inductor must be rated for the maximum DC

load current plus 1/2 of the ripple current.

The ripple current under minimum V conditions is also

IN

checked using the following equations.

TON _ VINMIN

25pF u RTON u VOUT  10ns 384ns

VINMIN

IRIPPLE

(VIN  VOUT ) u TON

L

IRIPPLE _ VIN

(10.8  1.05) u 384ns

0.88PH

4.25A

Capacitor Selection

The output capacitors are chosen based on required ESR

and capacitance. The maximum ESR requirement is con-

trolled by the output ripple requirement and the DC toler-

ance. The output voltage has a DC value that is equal to

the valley of the output ripple plus 1/2 of the peak-to-peak

ripple. Change in the output ripple voltage will lead to a

change in DC voltage at the output.

The design goal is that the output voltage regulation be

±4% under static conditions. The internal 500mV refer-

ence tolerance is 1%. Allowing 1% tolerance from the FB

resistor divider, this allows 2% tolerance due to V ripple.

OUT

Since this 2% error comes from 1/2 of the ripple voltage,

the allowable ripple is 4%, or 42mV for a 1.05V output.

The maximum ripple current of 4.4A creates a ripple

voltage across the ESR. The maximum ESR value allowed

is shown by the following equations.

ESRMAX

VRIPPLE

IRIPPLEMAX

ESRMAX = 9.5 mΩ

42mV

4.4A

The output capacitance is usually chosen to meet tran-

sient requirements. A worst-case load release, from

maximum load to no load at the exact moment when

inductor current is at the peak, determines the required

capacitance. If the load release is instantaneous (load

changes from maximum to zero in < 1μs), the output

capacitor must absorb all the inductor’s stored energy.

This will cause a peak voltage on the capacitor according

to the following equation.

COUTMIN

L¨§

©

IOUT



1

2

u IRIPPLEMAX

¸·

¹

2

    2

2

VPEAK  VOUT

Assuming a peak voltage V of 1.150 (100mV rise upon

PEAK

load release), and a 10A load release, the required capaci-

tance is shown by the next equation.

COUTMIN

0.88PH¨§10  1 u 4.4¸· 2

©2 ¹

1.15 2 1.05 2

COUTMIN = 595μF

If the load release is relatively slow, the output capacitance

can be reduced. At heavy loads during normal switching,

when the FB pin is above the 500mV reference, the DL

output is high and the low-side MOSFET is on. During this

time, the voltage across the inductor is approximately

-V . This causes a down-slope or falling di/dt in the

OUT

21

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