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C167CS-4R

16-Bit CMOS Single-Chip Microcontrollers C166 Family

Infineon Technologies 

C167CS-4R

C167CS-L

Table 2

Pin Definitions and Functions (cont’d)

Symbol Pin Input Function

Num. Outp.

ALE 98

O

Address Latch Enable Output. Can be used for latching the

address into external memory or an address latch in the

multiplexed bus modes.

EA

99

I

External Access Enable pin. A low level at this pin during and

after Reset forces the C167CS to begin instruction execution

out of external memory. A high level forces execution out of

the internal program memory.

“ROMless” versions must have this pin tied to ‘0’.

PORT0

IO

P0L.0-7 100-

107

P0H.0-7 108,

111-

117

PORT0 consists of the two 8-bit bidirectional I/O ports P0L

and P0H. It is bit-wise programmable for input or output via

direction bits. For a pin configured as input, the output driver

is put into high-impedance state.

In case of an external bus configuration, PORT0 serves as

the address (A) and address/data (AD) bus in multiplexed

bus modes and as the data (D) bus in demultiplexed bus

modes.

Demultiplexed bus modes:

Data Path Width: 8-bit

16-bit

P0L.0 – P0L.7:

D0 – D7

D0 – D7

P0H.0 – P0H.7: I/O

D8 – D15

Multiplexed bus modes:

Data Path Width: 8-bit

16-bit

P0L.0 – P0L.7:

AD0 – AD7 AD0 – AD7

P0H.0 – P0H.7: A8 – A15 AD8 – AD15

Data Sheet

10

V2.2, 2001-08

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