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SAA2032

Digital equalization for the tape drive processing of the DCC system

Philips Electronics 

Philips Semiconductors

Digital equalization for the tape

drive processing of the DCC system

Product specification

SAA2032

CONVERTER CHARACTERISTICS

VDD = 3.8 to 5.5 V; Tamb = −40 to 85 °C; unless otherwise specified.

SYMBOL

PARAMETER

CONDITIONS

Analog-to-Digital Converter; VIN

resolution

conversation data available after

effective input bandwidth

differential non-linearity

6-bit resolution

at fs = 3.1 MHz

Vrefn

Vrefp

∆Vref

reference voltage at VREFN

reference voltage at VREFP

reference voltage difference

between REFP and REFN

note 1

Vi

S+THD/N

input voltage

signal-to-total harmonic

distortion and noise ratio

note 2

Ci

input capacitance

II

input current (DC)

Digital-to-analog converter; output ANEYE

note 3

resolution

VO

output voltage

VO

output voltage range

note 4

note 4

MIN.

−

−

0.5

−

0.7

2.7

2

Vrefn

21

−

−

−

−

−

Notes

1. Vrefp is supplied externally.

Vrefn is derived internally and set to 1/3Vrefp.

Vrefn must be decoupled externally at pin 6 via a 100 nF capacitor.

2. Signal level (fs) −20 dB, at any DC level within the input voltage range.

3. The output impedance of the analog input signal source must be <150 Ω.

4. Load impedance ≥1 MΩ.

TYP.

7

2 × tcy

−

−

1.0

3.1

2.1

−

−

−

−

6

−

1.1

MAX.

−

−

−

±0.99

1.4

3.4

2.7

Vrefp

−

15

100

−

VDDAD

−

UNIT

bits

MHz

LSB

V

V

V

V

dB

pF

µA

bits

V

V

February 1995

20

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