Philips Semiconductors
PLL FM demodulator for DBS signals
Preliminary specification
TDA8730
CHARACTERISTICS
VDD = 9 V; Tamb = 25 °C; f = 480 MHz; Input level 70 dBµV; measured in circuit of Fig.4 unless otherwise specified.
SYMBOL
PARAMETER
CONDITIONS
MIN. TYP. MAX UNIT
.
Supply
VDD
supply voltage
IDD
supply current
Vpin 12 to pin 10 or pin15 8.1
Ipin 12; note 1
−
Frequency demodulator
fosc
minimum oscillator frequency
−
−
fosc
maximum oscillator frequency
−
−
Vi
operating input level
pin 13; note 2
−
input reflection coefficient S11
S11
unbalanced; pin 14 decoupled (50 Ω
reference)
pin 13; note 3
−
balanced; 100 Ω reference
Kd
phase detector constant
pin 13 to pin 14
−
(level at pin 13 is 70 dBµV) −
Ko
VCO constant
−
Ao
open loop gain of loop amplifier
pin 7 to pin 8
−
f-3 dB
open loop bandwidth of loop amplifier
−
Zin
input impedance of feedback input
pin 8
−
Zout
output impedance of loop amplifier
pin 7
−
le
VCO linearity error over ∆f = ±10 MHz note 4
−
shift of DC level at video output for
pin 9
−
∆VDD = ±10%
with unmodulated 480 MHz input signal
drift of DC level at video output for
pin 9
−
Tamb = 25 to 50 °C
with unmodulated 480 MHz input signal
VVCO
VCO capture range
±14
Gd
differential gain
note 5
−
φd
differential phase
note 5
−
MOD
intermodulation
note 6
−
9.0 9.9 V
75 90 mA
130 − MHz
720 − MHz
70 74 dBµV
0.07 −
0.11 −
0.45 − V/rad.
12 − MHz/V
40 − dB
2.8 − MHz
930 − Ω
30 50 Ω
1
−%
−
±50 mV
−
+50 mV
−
− MHz
−
±4 %
−
±2 deg.
−70 − dB
AGC
VIAGC
AGC threshold (IAGC = 0 mA) as a
function of voltage applied to pin 16
Vpin16 = 0.8 V
Vpin 16 = 9.0 V
AGC steepness
AGC output saturation voltage HIGH at
I = −0.2 mA
AGC output saturation voltage LOW at
I = 0.2 mA
pin 13
note 7
pin 1; note 8
Vpin 1 to pin 10 or pin 15
−
−
73
−
−
18
VDD-0.5 −
−
1.8
67 dBµV
− dBµV
− mA/dB
VDD V
2.3 V
March 1991
6