S-1132B38-M5T1G Ver la hoja de datos (PDF) - Seiko Instruments Inc

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Fabricante

S-1132B38-M5T1G

HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR

Seiko Instruments Inc 

HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR

Rev.3.2_00

S-1132 Series

„ Operation

1. Basic operation

Figure 13 shows the block diagram of the S-1132 Series.

The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-divided by

feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary to ensure a certain

output voltage free of any fluctuations of input voltage and temperature.

VIN

Current

supply

Vref

Error

amplifier

−

+

Reference

voltage circuit

*1

Rf

Vfb

Rs

VOUT

VSS

*1. Parasitic diode

Figure 13

2. Output transistor

The S-1132 Series uses a low on-resistance P-channel MOS FET as the output transistor.

Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due to inverse

current flowing from the VOUT pin through a parasitic diode to the VIN pin.

Seiko Instruments Inc.

13

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