S-1131 Ver la hoja de datos (PDF) - Seiko Instruments Inc

Número de pieza

componentes Descripción

Fabricante

S-1131

HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR

Seiko Instruments Inc 

HIGH RIPPLE-REJECTION LOW DROPOUT MIDDLE OUTPUT CURRENT CMOS VOLTAGE REGULATOR

S-1131 Series

Rev.3.0_01

„ Operation

1. Basic operation

Figure 13 shows the block diagram of the S-1131 Series.

The error amplifier compares the reference voltage (Vref) with Vfb, which is the output voltage resistance-

divided by feedback resistors Rs and Rf. It supplies the output transistor with the gate voltage necessary

to ensure a certain output voltage free of any fluctuations of input voltage and temperature.

VIN

Current

supply

Vref

Error

amplifier

−

+

Reference voltage

circuit

*1

Rf

Vfb

Rs

VOUT

VSS

*1. Parasitic diode

Figure 13

2. Output transistor

The S-1131 Series uses a low on-resistance P-channel MOS FET as the output transistor.

Be sure that VOUT does not exceed VIN + 0.3 V to prevent the voltage regulator from being damaged due

to inverse current flowing from VOUT pin through a parasitic diode to VIN pin.

12

Seiko Instruments Inc.

Share Link: