DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

SZMD12C Ver la hoja de datos (PDF) - Secos Corporation.

Número de pieza
componentes Descripción
Fabricante
SZMD12C Datasheet PDF : 2 Pages
1 2
Elektronische Bauelemente
RATINGS AND CHARACTERISTICS CURVES
Clamping Voltage vs. Peak Pulse Current
30
Waveform
25
Parameters
tr = 8µs
td = 20µS
20
15
10
5
0
0
2
4
6
8
10
Peak Pulse Current - IPP (A)
110
100
90
80
70
60
50
40
30
20
10
0
0
Pulse Waveform
e-t
td = I PP /2
Wave form
Paramete rs:
tr = 8 s
td = 20 s
5
10
15
20
25
30
Time (us)
SZMD12C
150W, 12 V
Transient Voltage Suppressors
for ESD Protection
11 0
10 0
90
80
70
60
50
40
30
20
10
0
0
Power Derating Curve
25
50
75
100
125
150
Ambient Temperature - TA (oC)
Applications Information
Device Connection Options
The SZMD series is designed to protect one
bi-directional or two uni-directional data or l/O lines
operating at 12 volts.Connection options are as
follows:
Bidirectional:Pin 1 is connected to the data line and
pin 2 is connected to ground (Since the device lls
symmetrical,these conmtions may be re- Ver3ed).For
best results,the ground connection should be made
directly to a ground plane on the board.The path
length should be kept as short as possible to minimize
parasitic inductance-Pin 3 is not
connected. Unidirectional:Data lines are connected
to pin1 and pin2.Pin 3 is connected to ground.For
best results,this pin should be connected directly to a
ground plane on the board.The path lengh should be
kept as short as possible to minimize parasitic
inductance. Circuit Board Layout Recommendations
for suppres- sion of ESD. Good circuit board layout is
critical for the suppression of fast rise-time transients
such as ESD.The following guidelines are
recommended (Refer to application note Sl99.01 for
more detailed information): Place the TVS near the
input terminals or connec- tors to restrict transient
coupling. Minimize the path length between the
TVS and the protected line. Minimize all conductive
loops including power and ground loops. The ESD
transient return path toground should be kept as short
as possible. Never run critical signals near board
edges
Use ground planes whenever possib|e.
http://www.SeCoSGmbH.com/
01-June-2002 Rev. A
Any changes of specification will not be informed individually.
Page 2 of 2

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]