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RT9709 Ver la hoja de datos (PDF) - Richtek Technology

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RT9709 Datasheet PDF : 12 Pages
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RT9709
` VIN traces should be wide enough to minimize
inductance and handle the high currents. The trace
running from input to chip should be placed carefully
and shielded strictly.
` Input and output capacitors must be placed close to the
part. The connection between pins and capacitor pads
should be copper traces without any through-hole via
connection.
Output capacitor must be
placed between GND and VIN
to reduce noise.
Output capacitor must be
placed between GND and
VOUT to reduce noise.
GND
CIN
VIN 1
VIN 2
GND 3
WRN 4
NC 5
GND
11
10 VOUT
9 VOUT
8 ILIM
7 VB
EN
COUT
RVB
RILIM
GND
The exposed pad and GND should be connected to a
strong ground plane for heat sinking and noise prevention .
Figure 2. Recommended PCB Layout
www.richtek.com
10
DS9709-02 April 2011

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