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RT9209 Ver la hoja de datos (PDF) - Richtek Technology

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RT9209 Datasheet PDF : 14 Pages
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RT9209/A
Input / Output Capacitor
High frequency/long life decoupling capacitors should be
placed as close to the power pins of the load as physically
possible. Be careful not to add inductance to the PCB
trace, as it could eliminate the performance from utilizing
these low inductance components. Consult with the
manufacturer of the load on specific decoupling
requirements.
The output capacitors are necessary for filtering output
and stabilizing the close loop (see the PWM loop stability).
For powering advanced, high-speed processors, it is
required to meet with the requirement of fast load transient,
high frequency capacitors with low ESR/ESL capacitors
are recommended.
Another concern is high ESR induced ripple may trigger
UV or OV protections
PWM Loop Stability
The RT9209/A is a voltage mode buck controller designed
for 5V step-down applications. The gain of error amplifier
is fixed at 35dB for simplified design.
The output amplitude of ramp oscillator is 1.6V, the loop
gain and loop pole/zero are calculated as follows :
5 0.8
DC loop gain GA = 35 dB × ×
1.6 VOUT
1
LC filter pole PO = × π × LC
2
Error Amp pole PA = 300kHz
1
ESR zero ZO = × π × ESR × C
2
The RT9209/A Bode plot as shown Figure 5 is stable in
most of application conditions.
VOUT = 3.3V
COUT = 1500uF(33mΩ)
L = 2uH
40
VOUT = 1.5V
VOUT = 2.5V
30 VOUT = 3.3V
PO = 2.9kHz
ZO = 3.2kHz
20
Loop Gain
10
100
1k
10k
100k
1M
Figure 5
Reference Voltage
Because RT9209/A use a low 35dB gain error amplifier,
shown in Figure 6. The voltage regulation is dependent
on VIN & VOUT setting. The FB reference voltage of 0.8V
were trimmed at VIN = 5V & VOUT = 2.5V condition. In a
fixed VIN = 5V application, the FB reference voltage vs.
VOUT voltage can be calculated as Figure 7.
R2
FB
+
-
R1
56K
-
1K
EA
+
+
PWM
-
REF
0.8V
RAMP
1.75V
Figure 6
0.82
0.81
0.80
0.79
VIN = 5V
0.78
0.5 1 1.5 2 2.5 3 3.5 4 4.5
VOUT (V)
Figure 7
Feedback Divider
The reference of RT9209/A is 0.8V. The output voltage can
be set using a resistor based divider as shown in Figure 8.
Put the R1 and R2 as close as possible to FB pin and R2
should less than 1 kΩ to avoid noise coupling.
VIN
L
A
VOUT
COUT
R1
R2
RT9209/A
FB
Figure 8
www.richtek.com
12
DS9209/A-08 March 2007

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