R2A20121SP
Electrical Characteristics (cont.)
(Ta = 25°C, Vcc = 12 V, RT = 33 k, Rdelay = 51 k, unless otherwise specified.)
ERROR
AMPLIFIER
Item
Input offset voltage
FB (+) input current
FB (–) input current
Open-loop DC gain
Unity gain bandwidth
Output source current
Symbol
Vos
IFB (+)
IFB (–)
Av
BW
ISOURCE
Min
–2
–2.0
–2.0
—
—
–650
Typ
3
0
0
80 *1
2 *1
–500
Max
8
2.0
2.0
—
—
–390
Output sink current
ISINK
2.0
6.5
—
Output high voltage
VOH-EO
3.7
3.9
—
Output low voltage
VOL-EO
—
0.1
0.4
Output clamp voltage *4 VCLAMP-EO
–0.16
–0.07
0.0
PHASE
MODULATOR
DELAY
RAMP offset voltage
RAMP bias current
RAMP sink current *1
Minimum phase shift
Maximum phase shift
Delay to OUT-C, -D *2
RAMP discharge time *1
DELAY-1, -2, -3 *3
DELAY2-1, -2, -3 *1*3
VRAMP
IRAMP
ISINK-RAMP
Dmin
Dmax
Tpd
Tdis
TD1, 2, 3
TD2_1, _2, _3
1.035
–5
8
—
—
—
40
22
70
1.135
–0.8
26
0 *1*5
97.0 *1*5
30
80
33.5
100
Terminal voltage
VD1, 2, 3
1.9
2.0
Notes: 1. Reference values for design. Not 100% tested in production.
2. Tpd is defined as;
RAMP
1V
0V
50%
5V
OUT-C/D 0 V
50%
1.235
5
—
—
—
60
120
45
130
2.1
Unit
mV
µA
µA
dB
MHz
µA
mA
V
V
V
V
µA
mA
%
%
ns
ns
ns
ns
V
Test Conditions
FB (–) and COMP are shorted.
VFB (+) = 1.25 V
FB (+) = FB (–) = 1.25 V
FB (+) = FB (–) = 1.25 V
FB (+) = 1.25 V,
FB (–) = 0.75 V, COMP = 2 V
FB (+) = 1.25 V,
FB (–) = 1.75 V, COMP = 2 V
FB (+) = 1.25 V,
FB (–) = 0.75 V, COMP; Open
FB (+) = 1.25 V,
FB (–) = 1.75 V, COMP; Open
FB (+) = 1.25 V, FB (–) = 0.75 V,
COMP; Open, SS = 1 V
RAMP = 0.3 V
RAMP = 1 V, COMP = 0 V
RAMP = 1 V, COMP = 0 V
RAMP = 0 V, COMP = 2.1 V
COMP = 1.6 V
Delay set R = 51 k
Delay set R = 180 k
Delay set R = 51 k
Tpd
3. TD1, 2, 3 are defined as;
TD1
TD1
OUT-A
For primary OUT-B
50%
control
OUT-C
TD2
TD2
OUT-D
For secondary OUT-E TD3
control
OUT-F
TD3
4. VCLAMP-EO = VCOMP – SS voltage (1 V)
5. Maximum/Minimum phase shift is defined as;
T2
D = × 2 × 100 (%)
T1
OUT-A
T2
OUT-D
T1
OUT-B
T2
OUT-C
T1
REJ03D0914-0100 Rev.1.00 Sep 29, 2008
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