PSD913G3-C-15B81 Ver la hoja de datos (PDF) - STMicroelectronics

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PSD913G3-C-15B81

Configurable Memory System on a Chip for 8-Bit Microcontrollers

STMicroelectronics 

PSD9XX Family

The

PSD935G2

Functional

Blocks

(cont.)

PSD935G2

Table 9. Instructions

Instruction

FS0-7

or

CSBOOT0-3 Cycle 1 Cycle 2 Cycle 3 Cycle 4

Cycle5

Read (Note 5)

1

“Read”

RA RD

Read Main Flash ID

(Notes 6,13)

1

AAh

55h

90h

“Read”

@555h @AAAh @555h

ID

@x01h

Read Sector Protection

(Notes 6,8,13)

1

AAh

55h

90h

“Read”

@555h @AAAh @555h 00h or 01h

@x02h

Program a Flash Byte

1

AAh

55h

A0h

PD@PA

@555h @AAAh @555h

Erase One Flash Sector

1

AAh

55h

80h

AAh

55h

@555h @AAAh @555h @555h @AAAh

Erase Flash Block

(Bulk Erase)

Suspend Sector Erase

(Note 11)

Resume Sector Erase

(Note 12)

Reset (Note 6)

Unlock Bypass

Unlock Bypass Program

(Note 9)

Unlock Bypass Reset

(Note 10)

1

AAh

55h

80h

AAh

55h

@555h @AAAh @555h @555h @AAAh

1

B0h

@xxxh

1

30h

@xxxh

1

F0 @ any

address

1

AAh

55h

20h

@555h @AAAh @555h

1

A0h PD@PA

@xxxh

1

90h

00h

@xxxh @xxxh

Cycle 6 Cycle 7

30h

@SA

10h

@555h

30h

@next SA

(Note 7)

X = Don’t Care.

RA = Address of the memory location to be read.

RD = Data read from location RA during read operation.

PA = Address of the memory location to be programmed. Addresses are latched on the falling edge of the WR#

(CNTL0) pulse.

PD = Data to be programmed at location PA. Data is latched o the rising edge of WR# (CNTL0) pulse.

SA = Address of the sector to be erased or verified. The chip select (FS0-7 or CSBOOT0-3) of the sector to be

erased must be active (high).

NOTES:

1. All bus cycles are write bus cycle except the ones with the “read” label.

2. All values are in hexadecimal.

3. FS0-7 and CSBOOT0-3 are active high and are defined in PSDsoft.

4. Only Address bits A11-A0 are used in Instruction decoding. A15-12 (or A16-A12) are don’t care.

5. No unlock or command cycles required when device is in read mode.

6. The Reset command is required to return to the read mode after reading the Flash ID, Sector Protect status

or if DQ5 (error flag) goes high.

7. Additional sectors to be erased must be entered within 80µs.

8. The data is 00h for an unprotected sector and 01h for a protected sector. In the fourth cycle, the sector chip

select is active and (A1 = 1, A0 = 0).

9. The Unlock Bypass command is required prior to the Unlock Bypass Program command.

10. The Unlock Bypass Reset command is required to return to reading array data when the device is in the

Unlock Bypass mode.

11. The system may read and program functions in non-erasing sectors, read the Flash ID or read the Sector

Protect status, when in the Erase Suspend mode. The erase Suspend command is valid only during a sector

erase operation.

12. The Erase Resume command is valid only during the Erase Suspend mode.

13. The MCU cannot invoke these instructions while executing code from the same Flash memory for which the

instruction is intended. The MCU must fetch, for example, codes from the secondary block when reading the

Sector Protection Status of the main Flash.

18

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