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PM6681A(2006) Ver la hoja de datos (PDF) - STMicroelectronics

Número de pieza
componentes Descripción
Fabricante
PM6681A
(Rev.:2006)
ST-Microelectronics
STMicroelectronics ST-Microelectronics
PM6681A Datasheet PDF : 12 Pages
1 2 3 4 5 6 7 8 9 10 Next Last
Pin settings
PM6681A
Table 1. Pin functions (continued)
Pin
Function
Feedback input for the adjustable internal linear regulator. This pin is
16
LDO FB connected to a resistive voltage-divider from LDO to SGND to adjust the
output voltage from 0.9V to 3.3V.
Internal 5V regulator bypass connection.
– If V5SW is connected to OUT5 (or to an external 5V supply) and V5SW is
17
V5SW
greater than 4.9V, the LDO5 regulator shuts down and the LDO5 pin is
directly connected to OUT5 through a 3W (max) switch.
If V5SW is connected to GND, the LDO5 linear regulator is always on.
18
LDO5
5V internal regulator output. It can provide up to 100mA peak current. LDO5
pin supplies embedded low side gate drivers and an external load.
19
VIN
Device supply voltage input and battery voltage sense. A bypass filter (4
and 4.7mF) between the battery and this pin is recommended.
Positive current sense input for the switching section 1. This pin must be
20 CSENSE1 connected through a resistor to the drain of the synchronous rectifier to
obtain a positive current limit threshold for the power supply controller.
21
PHASE1
Switch node connection and return path for the high side driver for the
section 1.It is also used as negative current sense input.
22
HGATE1
High-side gate driver ouput for section 1. This is the floating gate driver
output.
23
BOOT1
Bootstrap capacitor connection for the switching section 1. It supplies the
high-side gate driver.
Pulse skipping mode control input.
– If the pin is connected to LDO5 the PWM mode is enabled.
24
SKIP
– If the pin is connected to GND, the pulse skip mode is enabled.
– If the pin is connected to VREF the pulse skip mode is enabled but the
switching frequency is kept higher than 33KHz (No-audible puse skip
mode).
Enable input for the switching section 1.
The section 1 is enabled applying a voltage greater than 2.4V to this pin.
25
EN1
The section 1 is disabled applying a voltage lower than 0.8V.
When the section is disabled the High Side gate driver goes low and Low
Side gate driver goes high.
Power Good ouput signal for the section 1. This pin is an open drain ouput
26
PGOOD1 and when the ouput of the switching section 1 is out of +/- 10% of its
nominal value.It is pulled down.
Power Good ouput signal for the section 2. This pin is an open drain ouput
27
PGOOD2 and when the ouput of the switching section 2 is out of +/- 10% of its
nominal value.It is pulled down.
Feedback input for the switching section 1. This pin is connected to a
28
FB1
resistive voltage-divider from OUT1 to PGND to adjust the output voltage
from 0.9V to 5.5V.
29
OUT1
Output voltage sense for the switching section 1.This pin must be directly
connected to the output votage of the switching section.
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