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PIC18F65J94 Ver la hoja de datos (PDF) - Microchip Technology

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PIC18F65J94 Datasheet PDF : 696 Pages
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PIC18F97J94 FAMILY
TABLE 1-4: PIC18F97J94 PINOUT I/O DESCRIPTIONS (CONTINUED)
Pin Name
Pin Number Pin Buffer
100 80 64 Type Type
Description
VLCAP1/RP8/CTED13/INT0/RB0
VLCAP1
RP8
CTED13
INT0
RB0
73 58 48
I
I/O
I
I
I/O
Analog
ST/DIG
ST
ST
ST/DIG
LCD Drive Charge Pump Capacitor Input 1.
Remappable Peripheral Pin 8 input/output.
CTMU Edge 13 input.
External Interrupt 0.
General purpose I/O pin.
VLCAP2/RP9/RB1
VLCAP2
RP9
RB1
72 57 47
I
I/O
I/O
Analog LCD Drive Charge Pump Capacitor Input 2.
ST/DIG Remappable Peripheral Pin 9 input/output.
ST/DIG General purpose I/O pin.
SEG9/RP14/CTED1/RB2
SEG9
RP14
CTED1
RB2
70 56 46
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG9 output for LCD.
Remappable Peripheral Pin 14 input/output.
CTMU Edge 1 input.
General purpose I/O pin.
SEG10/RP7/CTED2/RB3
SEG10
RP7
CTED2
RB3
69 55 45
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG10 output for LCD.
Remappable Peripheral Pin 7 input/output.
CTMU Edge 2 input.
General purpose I/O pin.
SEG11/RP12/CTED3/RB4
SEG11
RP12
CTED3
RB4
68 54 44
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG11 output for LCD.
Remappable Peripheral Pin 12 input/output.
CTMU Edge 3 input.
General purpose I/O pin.
SEG8/RP13/CTED4/RB5
SEG8
RP13
CTED4
RB5
67 53 43
O
I/O
I
I/O
Analog
ST/DIG
ST
ST/DIG
SEG8 output for LCD.
Remappable Peripheral Pin 13 input/output.
CTMU Edge 4 input.
General purpose I/O pin.
PGC/CTED5/RB6
PGC
CTED5
RB6
65 52 42
I/O
I
I/O
ST/DIG In-Circuit Debugger and ICSP™ programming clock pin.
ST CTMU Edge Input.
ST/DIG General purpose I/O pin.
PGD/CTED6/RB7
PGD
CTED6
RB7
58 47 37
I/O
I
I/O
ST/DIG In-Circuit Debugger and ICSP™ programming data pin.
ST CTMU Edge 6 input.
ST/DIG General purpose I/O pin.
Legend:
TTL = TTL compatible input
ST = Schmitt Trigger input with CMOS levels
I = Input
P = Power
I2C = I2C™/SMBus
CMOS = CMOS compatible input or output
Analog = Analog input
O
= Output
OD = Open-Drain (no P diode to VDD)
2012 Microchip Technology Inc.
DS30575A-page 19

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