PIC16LF1512-E/SP Ver la hoja de datos (PDF) - Microchip Technology

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PIC16LF1512-E/SP

28-Pin Flash Microcontrollers with XLP Technology

Microchip Technology 

TABLE 3-3: PIC16(L)F1512 MEMORY MAP (BANKS 0-7)

BANK 0

BANK 1

BANK 2

BANK 3

BANK 4

BANK 5

BANK 6

BANK 7

000h

Core Registers

(Table 3-2)

080h

Core Registers

(Table 3-2)

100h

Core Registers

(Table 3-2)

180h

Core Registers

(Table 3-2)

200h

Core Registers

(Table 3-2)

280h

Core Registers

(Table 3-2)

300h

Core Registers

(Table 3-2)

380h

Core Registers

(Table 3-2)

00Bh

00Ch

00Dh

00Eh

00Fh

010h

011h

012h

013h

014h

015h

016h

017h

018h

019h

01Ah

01Bh

01Ch

01Dh

01Eh

01Fh

020h

06Fh

070h

07Fh

PORTA

PORTB

PORTC

—

PORTE

PIR1

PIR2

—

—

TMR0

TMR1L

TMR1H

T1CON

T1GCON

TMR2

PR2

T2CON

—

—

—

General

Purpose

Register

80 Bytes

Common RAM

08Bh

10Bh

08Ch

TRISA

10Ch

08Dh

TRISB

10Dh

08Eh

TRISC

10Eh

08Fh

—

10Fh

090h

TRISE

110h

091h

PIE1

111h

092h

PIE2

112h

093h

—

113h

094h

—

114h

095h OPTION_REG 115h

096h

PCON

116h

097h WDTCON 117h

098h

—

118h

099h OSCCON 119h

09Ah OSCSTAT 11Ah

09Bh ADRES0L 11Bh

09Ch ADRES0H 11Ch

09Dh ADCON0 11Dh

09Eh ADCON1 11Eh

09Fh

0A0h

0BFh

—

General Purpose

Register

32 Bytes

11Fh

120h

0C0h

0EFh

0F0h

0FFh

Unimplemented

Read as ‘0’

Common RAM

(Accesses

70h – 7Fh)

16Fh

170h

17Fh

LATA

LATB

LATC

—

—

—

—

—

—

—

BORCON

FVRCON

—

—

—

—

—

APFCON

—

—

18Bh

18Ch

18Dh

18Eh

18Fh

190h

191h

192h

193h

194h

195h

196h

197h

198h

199h

19Ah

19Bh

19Ch

19Dh

19Eh

19Fh

1A0h

ANSELA

ANSELB

ANSELC

—

—

PMADRL

PMADRH

PMDATL

PMDATH

PMCON1

PMCON2

VREGCON(1)

—

RCREG

TXREG

SPBRGL

SPBRGH

RCSTA

TXSTA

BAUDCON

Unimplemented

Read as ‘0’

Unimplemented

Read as ‘0’

Common RAM

(Accesses

70h – 7Fh)

1EFh

1F0h

1FFh

Common RAM

(Accesses

70h – 7Fh)

20Bh

28Bh

30Bh

38Bh

20Ch

—

28Ch

—

30Ch

—

38Ch

—

20Dh

WPUB

28Dh

—

30Dh

—

38Dh

—

20Eh

—

28Eh

—

30Eh

—

38Eh

—

20Fh

—

28Fh

—

30Fh

—

38Fh

—

210h

WPUE

290h

—

310h

—

390h

—

211h

SSPBUF

291h

CCPR1L

311h

—

391h

—

212h

SSPADD

292h

CCPR1H

312h

—

392h

—

213h

SSPMSK

293h CCP1CON 313h

—

393h

—

214h SSPSTAT 294h

—

314h

—

394h

IOCBP

215h SSPCON1 295h

—

315h

—

395h

IOCBN

216h SSPCON2 296h

—

316h

—

396h

IOCBF

217h SSPCON3 297h

—

317h

—

397h

—

218h

—

298h

CCPR2L

318h

—

398h

—

219h

—

299h

CCPR2H

319h

—

399h

—

21Ah

—

29Ah CCP2CON 31Ah

—

39Ah

—

21Bh

—

29Bh

—

31Bh

—

39Bh

—

21Ch

—

29Ch

—

31Ch

—

39Ch

—

21Dh

—

29Dh

—

31Dh

—

39Dh

—

21Eh

—

29Eh

—

31Eh

—

39Eh

—

21Fh

—

29Fh

—

31Fh

—

39Fh

—

220h

2A0h

320h

3A0h

Unimplemented

Read as ‘0’

Unimplemented

Read as ‘0’

Unimplemented

Read as ‘0’

Unimplemented

Read as ‘0’

26Fh

270h

27Fh

Common RAM

(Accesses

70h – 7Fh)

2EFh

2F0h

2FFh

Common RAM

(Accesses

70h – 7Fh)

36Fh

370h

37Fh

Common RAM

(Accesses

70h – 7Fh)

3EFh

3F0h

3FFh

Common RAM

(Accesses

70h – 7Fh)

Legend:

= Unimplemented data memory locations, read as ‘0’.

Note 1: PIC16F1512 only.

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