HYS72V4200GU-10 Ver la hoja de datos (PDF) - Infineon Technologies
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HYS72V4200GU-10 Datasheet PDF : 15 Pages
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HYS64(72)V4200/8220GU
SDRAM-Modules
SPD-Table for PC66 modules:
Byte#
Description
0 Number of SPD bytes
1 Total bytes in Serial PD
2 Memory Type
3 Number of Row Addresses (without BS bits)
4 Number of Column Addresses
(for x16 SDRAM)
5 Number of DIMM Banks
6 Module Data Width
7 Module Data Width (cont’d)
8 Module Interface Levels
9 SDRAM Cycle Time at CL=3
10 SDRAM Access time from Clock at CL=3
11 Dimm Config (Error Det/Corr.)
12 Refresh Rate/Type
13 SDRAM width, Primary
14 Error Checking SDRAM data width
15 Minimum clock delay for back-to-back ran-
dom column address
16 Burst Length supported
17 Number of SDRAM banks
18 Supported CAS Latencies
19 CS Latencies
20 WE Latencies
21 SDRAM DIMM module attributes
22 SDRAM Device Attributes :General
23 Minimum Clock Cycle Time at CAS Latency
=2
24 Maximum data access time from Clock for
CL=2
25 Minimum Clock Cycle Time at CL = 1
26 Maximum Data Access Time from Clock at
CL=1
27 Minimum Row Precharge Time
28 Minimum Row Active to Row Active delay
tRRD
SPD Entry
Value
128
256
SDRAM
12
8
1/2
64
0
LVTTL
10.0 ns
7.0 ns
none
Self-Refresh,
15.6µs
x16
n/a / x8
tccd = 1 CLK
1, 2, 4, 8 & full
page
4
CL = 2 & 3
CS latency = 0
WL = 0
non buffered/
non reg.
Vcc tol +/- 10%
15.0 ns
8.0 ns
not supported
not supported
24 ns
20 ns
4Mx64
-10
80
08
04
0C
08
01
40
00
01
A0
70
00
80
10
00
01
8F
04
06
01
01
00
06
F0
80
FF
FF
18
14
Hex
4Mx72
-10
80
08
04
0C
08
8Mx64
-10
80
08
04
0C
08
01
02
48
40
00
00
01
01
A0
A0
70
70
02
00
80
80
10
10
08
00
01
01
8F
8F
04
04
06
06
01
01
01
01
00
00
06
06
F0
F0
80
80
FF
FF
FF
FF
18
18
14
14
8Mx72
-10
80
08
04
0C
08
02
48
00
01
A0
70
02
80
10
08
01
8F
04
06
01
01
00
06
F0
80
FF
FF
18
14
Semiconductor Group
13
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