HYS72V32220GU-8 Ver la hoja de datos (PDF) - Infineon Technologies
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HYS72V32220GU-8 Datasheet PDF : 17 Pages
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HYS 64(72)V16200/3222(0)0/64220GU
SDRAM Modules
SPD-Table for 256MBit SDRAM based PC100 Modules (cont’d)
Byte# Description
SPD Entry
Value
Hex
64M×64 64M×64 64M×72 64M×72
two bank two bank two bank two bank
-8
-8B
-8
-8B
28
Minimum Row Active to 16/20 ns
Row Active delay tRRD
10
14
10
14
29
Minimum RAS to CAS 20 ns
delay tRCD
14
14
14
14
30
Minimum RAS pulse
width tRAS
50/60 ns
32
3C
32
3C
31
Module Bank Density
256 MByte
40
40
40
40
(per bank)
32
SDRAM input setup time 2 ns
20
20
20
20
33
SDRAM input hold time 1 ns
10
10
10
10
34
SDRAM data input hold 2 ns
time
20
20
20
20
35
SDRAM data input setup 1 ns
time
10
10
10
10
62-61 Superset information
(may be used in future)
FF
FF
FF
FF
62
SPD Revision
Revision 1.2
12
12
12
12
63
Checksum for bytes
0 - 62
10
65
22
77
64- Manufacturers
125 information (optional)
(FFH if not used)
126 Frequency Specification 100 MHz
XX
XX
XX
XX
64
64
64
64
127 100 MHz support details
FF
FD
FF
FD
128+ Unused storage locations
FF
FF
FF
FF
Semiconductor Group
16
1998-08-01
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