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HT49R50

8-Bit Microcontroller

Holtek Semiconductor 

HT49R50

Pin Description

Pin Name I/O Options

Description

PA0/BZ

PA1/BZ

PA2

PA3/PFD

PA4~PA7

PA0~PA7 constitute an 8-bit bidirectional input/output port

I/O

Wake-up

Pull-high

or None

CMOS or

NMOS

with Schmitt trigger input capability. Each bit on port can be

configured as a wake-up input by options. PA0~PA3 can be con-

figured as a CMOS output or NMOS input/output with or with-

out pull-high resistor by options. PA4~PA7 are always

pull-high NMOS input/output. Of the eight bits, PA0~PA1 can

be set as I/O pins or buzzer outputs by options. PA3 can be set

as an I/O pin or as a PFD output also by options.

PB0/INT0

PB1/INT1

PB2/TMR0

PB3/TMR1

PB4~PB7

I

PB0~PB7 constitute an 8-bit Schmitt trigger input port. Each

bit on port are pull-high resistor. Of the eight bits, PB0 and PB1

¾

can be set as input pins or as external interrupt control pins

(INT0) and (INT1) respectively, by software application. PB2

and PB3 can be set as an input pin or as a timer/event counter

input pin TMR0 and TMR1 also by software application.

PC0~PC3

Pull-high PC0~PC3 constitute a 4-bit bidirectional input/output port

I/O

or None

CMOS or

with a schmitt trigger input capability. On the port, such can be

configured as CMOS output or NMOS input/output with or

NMOS without pull-high resistor by options.

VSS

¾

¾

Negative power supply, GND

VLCD

I

¾

LCD power supply

V1,V2,C1,C2 I

¾

Voltage pump

SEG32/COM3

COM2~COM0

O

1/3 or 1/4

Duty

SEG32 can be set as a segment or as a common output driver for

LCD panel by options. COM2~COM0 are outputs for LCD

panel plate.

SEG31~SEG0 O

¾

LCD driver outputs for LCD panel segments

OSC4

OSC3

O

I

¾

Real time clock oscillators

VDD

¾

¾

Positive power supply

OSC2

OSC1

O

I

Crystal or

RC

OSC1 and OSC2 are connected to an RC network or a crystal

(by options) for the internal system clock. In the case of RC op-

eration, OSC2 is the output terminal for 1/4 system clock.

RES

I

¾

Schmitt trigger reset input, active low

6

October 22, 1999

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