PCF2119VU/2/F2 Ver la hoja de datos (PDF) - NXP Semiconductors.
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PCF2119VU/2/F2 Datasheet PDF : 79 Pages
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NXP Semiconductors
PCF2119x
LCD controllers/drivers
Bit D: The display is on when bit D = 1 and off when bit D = 0. Display data in the DDRAM
is not affected and can be displayed immediately by setting bit D = 1.
When the display is off (bit D = 0) the chip is in partial power-down mode:
• The LCD outputs are connected to VSS
• The VLCD generator and bias generator are turned off
Three oscillator cycles are required after sending the ‘display off’ instruction to ensure all
outputs are at VSS, afterwards the oscillator can be stopped. If the oscillator is running
during partial power-down mode (‘display off’) the chip can still execute instructions. Even
lower current consumption is obtained by inhibiting the oscillator (pin OSC to VSS).
To ensure IDD < 1 µA:
• the parallel bus ports DB7 to DB0 should be connected to VDD
• pins RS and R/W should be connected to VDD or left open-circuit
• pin PD should be connected to VDD
Recovery from power-down mode:
• pin PD should be connected back to VSS
• if necessary pin OSC should be connected back to VDD
• a Display_ctl instruction with bit D = 1 should be sent
Bit C: The cursor is displayed when bit C = 1 and inhibited when bit C = 0. Even if the
cursor disappears, bit I_D and bit S (see Section 10.2.2.3) remain in operation during
display data write. The cursor is displayed using 5 dots in the 8th line (see Figure 16).
Bit B: The character indicated by the cursor blinks when bit B = 1. The character blink is
displayed by switching between display characters and all dots on with a period of
approximately 1 second, with f blink = 5---2-f--o2---s2--c-4--
10.2.2.5 Curs_disp_shift
Table 20. Curs_disp_shift bit description
Bit
Symbol
Value
Description
RS
-
0
see Table 10
R/W -
0
7 to 4
0001
fixed value
3
SC
cursor move or display shift
0
move cursor
1
shift display
2
RL
shift or move to the right or left
0
left shift or move
1
right shift or move
1 to 0 -
00
fixed value
PCF2119X_5
Product data sheet
Rev. 05 — 13 August 2009
© NXP B.V. 2009. All rights reserved.
31 of 79
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