PCF2113WU Ver la hoja de datos (PDF) - NXP Semiconductors.

Número de pieza

componentes Descripción

Fabricante

PCF2113WU

LCD controllers/drivers

NXP Semiconductors. 

NXP Semiconductors

PCF2113x

LCD controllers/drivers

frame n

state 1

COL 1 −

ROW 17

Voper

2/3Voper

1/3Voper

0

−1/3Voper

−2/3Voper

−Voper

state 2

COL 2 −

ROW 17

Voper

2/3Voper

1/3Voper

0

−1/3Voper

−2/3Voper

−Voper

Voper

2/3Voper

state 3

1/3Voper

COL 1 −

0

ROW 1 to 16 −1/3Voper

−2/3Voper

−Voper

Von(RMS) = 0.745Voper

Voff(RMS) = 0.333Voper

D = V-V----oo---fn--f = 2.23

Fig 17. MUX 1:2 LCD waveforms; Icon mode (b)

frame n + 1

state 1 (ON)

state 2 (OFF)

R17

R18

R1-16

state 3 (OFF)

mge998

8.15 Power-down mode

The chip can be put into Power-down mode by applying an external HIGH level to the

PD pin. In Power-down mode all static currents are switched off (no internal oscillator, no

bias level generation and all LCD outputs are internally connected to VSS).

During power-down, information in the RAMs and the chip state are preserved. Instruction

execution during power-down is possible when pin OSC is externally clocked.

8.16 Reset function

The PCF2113x automatically initializes (resets) when power is turned on. The chip

executes a reset sequence, including a ‘clear display’, requiring 165 oscillator cycles. After

the reset the chip has the state shown in Table 8.

PCF2113_FAM_4

Product data sheet

Rev. 04 — 4 March 2008

© NXP B.V. 2008. All rights reserved.

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