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PCF2113 Datasheet PDF : 65 Pages
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NXP Semiconductors
PCF2113x
LCD controllers/drivers
8.8 Address counter
The Address Counter (AC) assigns addresses to the DDRAM and CGRAM for reading
and writing and is set by the commands ‘set DDRAM address’ and ‘set CGRAM address’.
After a read/write operation the address counter is automatically incremented or
decremented by 1. The address counter contents are output to the bus (DB6 to DB0)
when bit RS = 0 and bit R/W = 1.
8.9 Display data RAM
The Display Data RAM (DDRAM) stores up to 80 characters of display data represented
by 8-bit character codes. RAM locations which are not used for storing display data can be
used as general purpose RAM. The basic RAM to display addressing scheme is shown in
Figure 4. With no display shift the characters represented by the codes in the first 24 RAM
locations starting at address 00h in line 1 are displayed. Figure 5 and Figure 6 show the
display mapping for right and left shift respectively.
When data is written to or read from the DDRAM, wrap-around occurs from the end of one
line to the start of the next line. When the display is shifted each line wraps around within
itself, independently of the others. Thus all lines are shifted and wrapped around together.
The address ranges and wrap-around operations for the various modes are shown in
Table 7.
display
position
12345
DDRAM 00 01 02 03 04
address
1-line display
DDRAM
address
12345
00 01 02 03 04
12345
40 41 42 43 44
2-line display
22 23 24
non-displayed DDRAM addresses
15 16 17 18 19
4C 4D 4E 4F
non-displayed DDRAM address
10 11 12
09 0A 0B 0C 0D
24 25 26 27
line 1
10 11 12
49 4A 4B 4C 4D
64 65 66 67 line 2
mge991
Fig 4. DDRAM to display mapping: no shift
display
position 1 2 3 4 5
DDRAM
address
4F 00 01 02 03
1-line display
1 23 4 5
DDRAM
address
27 00 01 02 03
1 23 4 5
67 40 41 42 43
2-line display
Fig 5. DDRAM to display mapping: right shift
22 23 24
14 15 16
10 11 12
08 09 0A line 1
10 11 12
48 49 4A line 2
mge992
PCF2113_FAM_4
Product data sheet
Rev. 04 — 4 March 2008
© NXP B.V. 2008. All rights reserved.
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