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9538 Ver la hoja de datos (PDF) - NXP Semiconductors.

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9538 Datasheet PDF : 28 Pages
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NXP Semiconductors
PCA9538
8-bit I2C-bus and SMBus low power I/O port with interrupt and reset
SDA
tBUF
SCL
tr
tLOW
tHD;STA
P
S
tHD;DAT
tf
tHIGH
tSU;DAT
Fig 14. Definition of timing
tHD;STA
tSP
tSU;STA
Sr
tSU;STO
P
002aaa986
protocol
START
condition
(S)
bit 7
MSB
(A7)
bit 6
(A6)
SCL
SDA
tSU;STA
tBUF
tLOW tHIGH
1 / fSCL
tr
tf
bit 1
(D1)
bit 0
(D0)
acknowledge
(A)
STOP
condition
(P)
tHD;STA
tSU;DAT tHD;DAT
Rise and fall times refer to VIL and VIH.
Fig 15. I2C-bus timing diagram
tVD;DAT
tVD;ACK
tSU;STO
002aab285
START
SCL
SDA
RESET 50 %
IOn
30 %
trec(rst)
Fig 16. Definition of RESET timing
PCA9538_5
Product data sheet
ACK or read cycle
trst
50 %
tw(rst)
50 %
trst
50 %
after reset,
I/Os reconfigured
as inputs
002aad732
Rev. 05 — 28 May 2009
© NXP B.V. 2009. All rights reserved.
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