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PCF84C440 Ver la hoja de datos (PDF) - Philips Electronics

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componentes Descripción
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PCF84C440
Philips
Philips Electronics Philips
PCF84C440 Datasheet PDF : 40 Pages
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Philips Semiconductors
8-bit microcontrollers with OSD and VST
Product specification
84C44X; 84C64X; 84C84X
12 ON SCREEN DISPLAY
12.1 Features
Display format: 2 rows × 16 characters
Software controlled vertical and horizontal display
position
64 different (mask programmable) characters in ROM
Black box background
Four programmable display character sizes
Four programmable character dot matrix sizes:
– 6 × 9 and 6 × 13
– 8 × 9 and 8 × 13
Half-dot rounding for the whole screen
4 from 7 colours possible on screen
Clock generator for On Screen Display function with:
– RC oscillator
– LC oscillator,
for the various types of PCA84C44X; 84C64X; 84C84X.
12.2 Horizontal display position control
The horizontal position counter is incremented every OSD
cycle after the programmed level of HSYNCN occurs at the
HSYNCN pin. The counter is reset when the opposite
polarity of the HSYNCN pulse is reached.
12.4 Clock generator
There are two types of oscillators available for the various
types. The oscillator is triggered on the trailing edge of
HSYNCN when the OSD logic is enabled and stops on the
following leading edge of HSYNCN.
The OSD oscillator must be externally adjusted to the
desired frequency (decreasing the OSD frequency gives
broader characters). Before the oscillation frequency can
be adjusted HSYNCN must be HIGH (if HLVL = 1).
Oscillation stops by setting the HSYNCN pin LOW when
HLVL = 1.
12.4.1 RC OSCILLATOR
The RC oscillator is available in the types:
PCA84C440; 84C443; 84C640; 84C643;
84C840; 84C843.
The external RC network is connected between
pin 28 and VSS (see Fig.19).
12.4.2 LC OSCILLATOR
The LC oscillator is available in the types:
PCA84C441; 84C444; 84C641; 84C644;
84C841; 84C844.
The external LC network is connected between
pins 28 and 29 (see Fig.20).
12.3 Vertical display position control
The vertical position counter is incremented every
HSYNCN cycle and is reset by the VSYNCN signal.
1996 Nov 29
19

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