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NCV8667 Ver la hoja de datos (PDF) - ON Semiconductor

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NCV8667 Datasheet PDF : 20 Pages
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NCV8667
for selected preset Early Warning options are described by
Equations 1 and 2.
ȡ ǒ Ǔȣ RSI1 RSI2 ) RSI_ext
ȧȢ ȧȤ Vin_EW(th)_Low + 1.1 1 )
RSI2 RSI_ext
) 0.25
(eq. 1)
ȧȡ RSI_ext + 1.1
ȢRSI2
RSI1 RSI2
ǒ Ǔ Vin_EW(th)_Low * 0.25 * 1.1
106ȧȣȤ
(eq. 2)
Where:
RSI1,RSI2 internal EW divider resistors (see Figure 3)
(select values from Early Warning Preset Options table)
RSIext external resistor connected between SI and GND
(recommended to be selected from 50 kW to 250 W)
If Adjustable Early Warning Threshold option
(NCV8667y0) is used EW threshold is adjusted by external
resistor divider. (See Figure 2) The values for RSI1 and RSI2
are selected for a typical threshold of 1.2 V on the SI pin
according to Equations 3 and 4, where Vin_EW(th) is
demanded value of input voltage at which Early Warning
signal has to be generated. RSI2 is recommended to be
selected in range of 100 kW to 1 MW. The higher are values
of resistors RSI1 and RSI2 the lower is current flowing
through the resistor divider, however this also increases a
delay between Input voltage and SI input voltage caused by
charging SI input capacitance with higher RC constant. The
delay can be lowered by decreasing the resistors values with
consequence of resistor divider current is increased.
ǒ Ǔ Vin_EW(th) + 1.25
1 ) RSI1
RSI2
(eq. 3)
ǒ Ǔ Vin_EW(th)
RSI1 + RSI2
*1
1.2
(eq. 4)
Sense Output
The Sense Output is from an open drain driver with an
internal 30 kW pull up resistor to Vout. Figure 26 shows the
SO Monitor timing waveforms as a result of the circuit
depicted in Figure 1. If the input voltage decreases the output
voltage decreases as well. If the SI input low threshold
voltage is crossed it causes the voltage on the SO output goes
low sending a warning signal to the microprocessor that a
reset signal may occur in a short period of time. TWARNING
is the time the microprocessor has to complete the function
it is currently working on and get ready for the reset
shutdown signal.
V out
V SI
V SI,Low
V RO
V SO
T WARNING
Figure 30. SO Warning Timing Diagram
Sense
Input
V SI,High
V SI,Low
Sense
Output
High
tPSOLH
t
tPSOHL
Low
t
Figure 31. Sense Input to Sense Output Timing Diagram
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