NCP3063BPG Ver la hoja de datos (PDF) - ON Semiconductor
Número de pieza
componentes Descripción
Fabricante
NCP3063BPG Datasheet PDF : 21 Pages
| |||
NCP3063, NCP3063B, NCV3063
(See Notes 9, 10, 11)
Step−Down
Step−Up
Voltage−Inverting
ton
toff
ton
CT
IL(avg)
Ipk (Switch)
RSC
L
Vripple(pp)
Vout ) VF
Vin * VSWCE * Vout
Vout ) VF * Vin
Vin * VSWCE
ton
toff
ǒ Ǔ f
ton
toff
)
1
ton
toff
ǒ Ǔ f
ton
toff
)
1
CT
+
381.6 @ 10*6
fosc
*
343
@
10*12
Iout
ǒ Ǔ Iout
ton
toff
)
1
IL(avg)
)
DIL
2
IL(avg)
)
DIL
2
0.20
Ipk (Switch)
0.20
Ipk (Switch)
ǒ Ǔ Vin * VSWCE * Vout
DIL
ton
Ǹǒ Ǔ2
DIL
1
8 f CO
) (ESR)2
ǒ Ǔ Vin * VSWCE
DIL
ton
[
ton Iout
CO
)
DIL
@
ESR
|Vout| ) VF
Vin * VSWCE
ton
toff
ǒ Ǔ f
ton
toff
)
1
ǒ Ǔ Iout
ton
toff
)
1
IL(avg)
)
DIL
2
0.20
Ipk (Switch)
ǒ Ǔ Vin * VSWCE
DIL
ton
[
ton Iout
CO
)
DIL
@
ESR
Vout
ǒ Ǔ VTH
R2
R1
)
1
ǒ Ǔ VTH
R2
R1
)
1
9. VSWCE − Darlington Switch Collector to Emitter Voltage Drop, refer to Figures 7, 8, 9 and 10.
10. VF − Output rectifier forward voltage drop. Typical value for 1N5819 Schottky barrier rectifier is 0.4 V.
11. The calculated ton/toff must not exceed the minimum guaranteed oscillator charge to discharge ratio.
ǒ Ǔ VTH
R2
R1
)
1
The Following Converter Characteristics Must Be Chosen:
Vin − Nominal operating input voltage.
Vout − Desired output voltage.
Iout − Desired output current.
DIL − Desired peak−to−peak inductor ripple current. For maximum output current it is suggested that DIL be chosen to be
less than 10% of the average inductor current IL(avg). This will help prevent Ipk (Switch) from reaching the current limit threshold
set by RSC. If the design goal is to use a minimum inductance value, let DIL = 2(IL(avg)). This will proportionally reduce
converter output current capability.
f − Maximum output switch frequency.
Vripple(pp) − Desired peak−to−peak output ripple voltage. For best performance the ripple voltage should be kept to a low
value since it will directly affect line and load regulation. Capacitor CO should be a low equivalent series resistance (ESR)
electrolytic designed for switching regulator applications.
Figure 15. Design Equations
http://onsemi.com
9
Share Link: 