NCP102 Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

NCP102

Low Dropout Linear Regulator Controller

ON Semiconductor 

NCP102

SOFT-START

Soft-start reduces inrush current and overshoot of the

output voltage. The adjustable soft-start built into the

NCP102 allows the user to select the optimum soft-start

time for the application. The soft-start time is set with a

capacitor from the SOFT-S pin to ground.

Soft-start is achieved by controlling the slope of the DRV

voltage based on the slope of the soft-start capacitor voltage,

CSOFT-S. The capacitor is charged to VCC with a constant

4.5 mA (typ.) current source, ISOFT-S. This results in a linear

charge of the soft-start capacitor and thus the output voltage.

The soft-start period, tSOFT-S, ends once the capacitor

voltage reaches 0.8 V (typ). The soft-start capacitor is

calculated using Equation 3.

ǒ Ǔ tSOFT*S +

cSOFT*S @ 0.8

ISOFT*S

(eq. 3)

The soft-start capacitor is internally pulled to GND when

VCC is not within its operating range or the controller is

disabled using the EN pin.

POWER SEQUENCING

Power sequencing can be easily implemented using the

SOFT-S and EN pins. This is achieved by directly

connecting the SOFT-S pin of the master controller to the

EN pin of the slave controller. If VCC is above 9.5 V a

resistor divider is required to limit the voltage on the EN pin

because the pin is internally clamped to 9.5 V. Figure 13

shows the timing waveforms of the master and slave

controllers.

Vout (slave)

Soft-Start (slave)

Vout (master)

Soft-Start (master)

Figure 13. Power-up Sequencing Waveforms

Power sequencing will affect the soft-start time

calculated using Equation 3 because the soft-start capacitor

charge current is now increased by the enable charge current.

The soft-start time is calculated using Equation 3 by

replacing ISOFT-S with the sum of IEN and ISOFT-S.

APPLICATION INFORMATION

ON Semiconductor provides an electronic design tool, a

demonstration board and an application note to facilitate

design using the NCP102 and to reduce development cycle

time. All the tools can be downloaded at www.onsemi.com.

The electronic design tool allows the user to easily

determine most of the system parameters of a linear

regulator. The tool also evaluates the frequency response of

the system. The demonstration board is designed to generate

a 1.2ĂV/3 A voltage supply from a 1.8 V supply. The circuit

schematic is shown in Figure 14 and the regulator design is

described in Application Note AND8303.

VCC

J1

Vin

J2

R8

ENABLE 1 k

J5 C11

100 p

TP1

MMBT3904

Q3

R7

365 k

R6

10 k

TP3

TP5 TP12

U1

Open C10

1

EN

6

VCC

0.01

C3

NTD40N03

470

2

GND

5

DRV

3 FB SOFT-S 4

R1

200

C4

100 p

Q2

Q1

TP6a

R2 100

C7

1000

NCP102 TP4

R5

TP7

C1

0

R3 10 k

0.01

R4

20 k

TP2a

TP2

C5 C6

4.7 0.1

Vout

C8 C9 J3

4.7 0.1 TP6

TP8

TP9

TP10

TP11

GND

J4

J6

Figure 14. Circuit Schematic

http://onsemi.com

8

Share Link: