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NBC12439 Ver la hoja de datos (PDF) - ON Semiconductor

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NBC12439 Datasheet PDF : 20 Pages
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NBC12439, NBC12439A
Table 8. AC CHARACTERISTICS (VCC = 3.135 V to 5.25 V ± 5%; TA = 0°C to 70°C (NBC12439), TA = --40°C to 85°C
(NBC12439A)) (Note 7)
Symbol
Characteristic
Condition
Min
Max
Unit
FIN
Input Frequency
S_CLOCK (Note 6)
Xtal Oscillator
FREF_EXT (Note 8)
--
10
MHz
10
20
10
100
FOUT
Output Frequency
VCO (Internal)
400
FOUT
50
tLOCK
tjitter(pd)
Maximum PLL Lock Time
Period Jitter (RMS)
(1σ) 50 MHz fOUT < 100 MHz
100 MHz fOUT < 800 MHz
tjitter(cyc--cyc) Cycle--to--Cycle Jitter (Peak--to--Peak)
(8σ) 50 MHz fOUT < 100 MHz
100 MHz fOUT < 800 MHz
ts
Setup Time
S_DATA to S_CLOCK
20
S_CLOCK to S_LOAD
20
M, N to P_LOAD
20
800
800
10
8
5
40
20
--
--
--
MHz
ms
ps
ps
ns
th
Hold Time
S_DATA to S_CLOCK
S_CLOCK to S_LOAD
M, N to P_LOAD
20
--
ns
20
--
20
--
tpwMIN
Minimum Pulse Width
S_LOAD
P_LOAD
50
--
ns
50
--
DCO
Output Duty Cycle
47.5
52.5
%
tr, tf
Output Rise/Fall
FOUT 20%--80%
175
425
ps
NOTE: Device will meet the specifications after thermal equilibrium has been established when mounted in a test socket or printed circuit
board with maintained transverse airflow greater than 500 lfpm. Electrical parameters are guaranteed only over the declared
operating temperature range. Functional operation of the device exceeding these conditions is not implied. Device specification limit
values are applied individually under normal operating conditions and not valid simultaneously.
6. 10 MHz is the maximum frequency to load the feedback divide registers. S_CLOCK can be switched at higher frequencies when used as
a test clock in TEST_MODE 6.
7. FOUT/FOUT outputs are terminated through a 50 Ω resistor to VCC -- 2.0 V. Internal phase detector can handle up to 100 MHz on it’s input.
8. Maximum frequency on FREF_EXT is a function of setting the appropriate M counter value, 20 M 80, for the VCO to operate within
the valid range of 400 MHz fVCO 800 MHz. (See Table 11)
9. See applications information section.
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