MXB7846 Ver la hoja de datos (PDF) - Maxim Integrated

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MXB7846

2.375V to 5.25V, 4-Wire Touch-Screen Controller with Internal Reference and Temperature Sensor

Maxim Integrated 

2.375V to 5.25V, 4-Wire Touch-Screen Controller

with Internal Reference and Temperature Sensor

Table 4. Power-Mode Selection

PD1 PD0 PENIRQ

STATUS

0

0

Enabled ADC is ON during conversion, OFF between conversion

0

1

Disabled ADC is always ON, reference is always OFF

1

0

Disabled ADC is always OFF, reference is always ON

1

1

Disabled ADC is always ON, reference is always ON

SUPPLY CURRENT (typ) (µA)

DURING

CONVERSION

200

AFTER

CONVERSION

1

200

200

400

400

600

600

CS

TB

RB2

tACQ

DCLK

1

4

8

9

12

16

RB3

20

24

DIN

BUSY

S

A2

A1

A0

MODE

SER/

DFR

PD1

PD0

IDLE

(START)

ACQUIRE

RB1

DOUT

A/D STATE

DRIVERS 1 AND 2

(SER/DFR HIGH)

IDLE

OFF

ACQUIRE

ON

DRIVERS 1 AND 2

(SER/DFR LOW)

OFF

CONVERSION

IDLE

11 10 9 8 7 6 5

4

3210

(MSB)

(LSB)

CONVERSION

IDLE

OFF

ON

OFF

Figure 9. Conversion Timing, 24-Clock per Conversion, 8-Bit Bus Interface

The fastest the MXB7846 can run with CS held continu-

ously low is 15 clock conversions. Figure 10 shows the

serial-interface timing necessary to perform a conver-

sion every 15 DCLK cycles. If CS is connected low and

DCLK is continuous, guarantee a start bit by first clock-

ing in 16 zeros.

Most microcontrollers (µCs) require that data transfers

occur in multiples of eight DCLK cycles; 16 clocks per

conversion is typically the fastest that a µC can drive the

MXB7846. Figure 11 shows the serial interface timing nec-

essary to perform a conversion every 16 DCLK cycles.

8-Bit Conversion

The MXB7846 provides an 8-bit conversion mode

selected by setting the MODE bit in the control byte

high. In the 8-bit mode, conversions complete four

clock cycles earlier than in the 12-bit output mode,

resulting in 25% faster throughput. This can be used in

conjunction with serial interfaces that provide 12-bit

transfers, or two conversions could be accomplished

with three 8-bit transfers. Not only does this shorten each

conversion by 4 bits, but each conversion can also

occur at a faster clock rate since settling to better than 8

bits is all that is required. The clock rate can be as much

as 25% faster. The faster clock rate and fewer clock

cycles combine to increase the conversion rate.

16 ______________________________________________________________________________________

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