MX25L1602
READ STATUS REGISTER TIMING WAVEFORM
CS
SCLK
SI
SO
CS
SCLK
SI
SO
CS
SCLK
SI
SO
B it 7 B it 6 B it 5 B it 4 B it 3 B it 2 B it 1 B it 0 B it 7 B it 6 B it 5 B it 4
H i-Z
1st byte (83h )
2n d b yte (Du mm y)
B it 1 B it 0
2n d b yte (Du mm y)
B it 7 B it 6 B it 5 B it 4 B it 3 B it 2 B it 1 B it 0 B it 7 B it 6 B it 5
1st status o utpu t b yte
2n d statu s ou tp ut byte
B it 3 B it 2 B it 1 B it 0 B it 7 B it 6 B it 5 B it 4 B it 3 B it 2 B it 1 B it 0
(N-1)th statu s ou tp ut byte
N th status o utpu t b yte
H i-Z
NOTES:
1. BIT 7=0 ==> Program/Erase completed
2. BIT 4=1 ==>Erase Error
3. BIT 3=1 ==>Program Error
4. BIT 1,2,5,6 ==> Reserve for future use
5. Bit 0=1 ==> Device is in ready state
P/N: PM0819
REV. 1.0, MAR. 04, 2003
16