MPC5644B Ver la hoja de datos (PDF) - Freescale Semiconductor

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componentes Descripción

Fabricante

MPC5644B

Microcontroller

Freescale Semiconductor 

2 Block diagram

Figure 1 shows the detailed block diagram of the MPC5646C.

JTAG Port

Nexus Port

Nexus

Voltage

regulator

NMI0

NMI1

Clocks

FMPLL

JTAGC

NMI0

NMI1

Nexus 3+

e200z0h

e200z4d

Nexus 3+

FEC

CSE

FlexRay

Instructions

(Master)

Data

(Master)

Instructions

(Master)

Data

(Master)

Interrupt requests

from peripheral

blocks

CMU

INTC

MPU

registers

SRAM Code Flash Data Flash

2  128 KB 2  1.5 MB 64 KB

2  SRAM

controller

Flash memory

controller

eDMA

( Master)

(Slave)

(Slave)

(Slave)

DMAMUX

CAN

Sampler

STCU

16 x

Semaphores RTC/API 4  STM SWT

8

ECSM PIT RTI

MC_RGM MC_CGM MC_ME MC_PCU

BAM SSCM WKPU

Interrupt

Request

SIUL

Reset Control

External

Interrupt

Request

IMUX

GPIO &

Pad Control

10 ch(1)

1  12-bit

ADC

27 ch or 33 ch(2)

1  10-bit

ADC

Peripheral Bridge

CTU

2  32 ch

eMIOS

10 

LINFlexD

8

DSPI

I2C

6

FlexCAN

Legend:

(3)

(3)

I/O

ADC

Analog-to-Digital Converter

BAM

Boot Assist Module

CSE

Cryptographic Services Engine

CAN

Controller Area Network (FlexCAN)

CMU

Clock Monitor Unit

CTU

Cross Triggering Unit

DMAMUX DMA Channel Multiplexer

DSPI

Deserial Serial Peripheral Interface

eDMA enhanced Direct Memory Access

FlexCAN Controller Area Network controller modules

FEC

Fast Ethenet Controller

eMIOS Enhanced Modular Input Output System

ECSM Error Correction Status Module

FMPLL Frequency-Modulated Phase-Locked Loop

FlexRay FlexRay Communication Controller

I2C

Inter-integrated Circuit Bus

IMUX

Internal Multiplexer

INTC

Interrupt Controller

JTAGC JTAG controller

LINFlexD Local Interconnect Network Flexible with DMA support

MC_ME Mode Entry Module

MC_CGM Clock Generation Module

MC_PCU Power Control Unit

MC_RGM Reset Generation Module

MPU

Memory Protection Unit

Nexus Nexus Development Interface

NMI

Non-Maskable Interrupt

PIT_RTI Periodic Interrupt Timer with Real-Time Interrupt

RTC/API Real-Time Clock/ Autonomous Periodic Interrupt

SIUL

System Integration Unit Lite

SRAM Static Random-Access Memory

SSCM System Status Configuration Module

STM

System Timer Module

SWT

Software Watchdog Timer

STCU Self Test Control Unit

WKPU Wakeup Unit

Notes:

1) 10 dedicated channels plus up to 19 shared channels. See the device-comparison table.

2) Package dependent. 27 or 33 dedicated channels plus up to 19 shared channels. See the device-comparison table.

3) 16 x precision channels (ANP) are mapped on input only I/O cells.

Figure 1. MPC5646C block diagram

MPC5646C Microcontroller Data Sheet, Rev. 3

6

Preliminary—Subject to Change Without Notice

Freescale Semiconductor

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