DatasheetQ Logo
Electronic component search and free download site. Transistors,MosFET ,Diode,Integrated circuits

ML9204 Ver la hoja de datos (PDF) - Oki Electric Industry

Número de pieza
componentes Descripción
Fabricante
ML9204 Datasheet PDF : 41 Pages
First Prev 11 12 13 14 15 16 17 18 19 20 Next Last
OKI Semiconductor
PEDL9204-02
ML9204-xx
Data Transfer Method and Command Write Method
Display control command and data are written by an 8-bit serial transfer.
Write timing is shown in the figure below.
Setting the CS pin to “Low” level enables a data transfer.
Data is 8 bits and is sequentially input into the DI/O pin from LSB (LSB first).
As shown in the figure below, data is read by the shift register at the rising edge of the shift clock, which is input
into the CP pin. If 8-bit data is input, internal load signals are automatically generated and data is written to each
register and RAM.
Therefore it is not necessary to input load signals from the outside.
Setting the CS pin to “High” disables data transfer. Data input from the point when the CS pin changes from
“High” to “Low” is recognized in 8-bit units.
CS
tDOFF
CP
tCSH
B0 B1B2 B3B4 B5 B6 B7 B0 B1B2 B3 B4 B5 B6 B7
DA
LSB
MSB LSB
MSB
1st byte
2nd byte
When data is written
to DCRAM*
Command and address data
Character code data
B0 B1B2 B3 B4 B5 B6 B7
LSB
MSB
3rd byte
Character code data of the
next address
* When data is written to RAM (DCRAM, ADRAM, CGRAM, GCRAM) continuously, addresses are internally
incremented automatically.
Therefore it is not necessary to specify the 1st byte to write RAM data for the 2nd and later bytes.
15/41

Share Link: 

datasheetq.com  [ Privacy Policy ]Request Datasheet ] [ Contact Us ]