ML2500B Ver la hoja de datos (PDF) - Oki Electric Industry

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componentes Descripción

Fabricante

ML2500B

Analog-Storage Single-chip Record/Playback LSI with 1M Bit-Cell Flash Memory

Oki Electric Industry 

OKI Semiconductor

FEDL2500BFULL-02

ML2500BTA

FUNCTIONAL DESCRIPTION

Serial Peripheral Interface (SPI)

ML2500B communicates with the external Micro-Controller Unit through the industry's standard Serial Peripheral

Interface (SPI).

1. Timing for Writing Command Data

The following charts show timings for writing command data. After “L” input to CS pin, input command data,

starting with the MSB in serial order, to the DI pin in sync with the SCK signal.

The command input to the DI pin is fetched to the LSI’s internal shift resister at the rising edge of the SCK signal,

and then the command is executed at the rising edge of the CS pin. The DI input is either of 4, 8, or 24th bit.

When the CS pin is brought to “H” level except at 4/8/24th bit for the command, the command input then is

disregarded. It is a recommendable practice to input command data at the falling edge of the CS pin while having

the SCK pin at “L”.

4-bit Command Format

CS(I)

SCK(I)

DI(I)

C3 C2 C1 C0

8-bit Command Format

CS(I)

C3 C2 C1 C0

SCK(I)

DI(I)

C3 C2 C1 C0 D3 D2 D1 D0

C3 C2 C1

24-bit Command Format

CS(I)

SCK(I)

1 2 3 4 5 6 7 8 9 10 11 12

DI(I)

C3 C2 C1 C0 X X X X X X X A12

CS(I)

SCK(I)

13 14 15 16 17 18 19 20 21 22 23 24

DI(I) A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0

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