MICRF002YM Ver la hoja de datos (PDF) - Micrel

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Fabricante

MICRF002YM

300-440MHz QwikRadio® ASK Receiver

Micrel 

Micrel, Inc.

Power Supply Bypass Capacitors

VDDBB and VDDRF should be connected together directly at

the IC pins. Supply bypass capacitors are strongly

recommended. They should be connected to VDDBB and

VDDRF and should have the shortest possible lead lengths.

For best performance, connect VSSRF to VSSBB at the power

supply only (that is, keep VSSBB currents from flowing

through the VSSRF return path).

Increasing Selectivity with an Optional BandPass

Filter

For applications located in high ambient noise

environments, a fixed value band-pass network may be

connected between the ANT pin and VSSRF to provide

additional receive selectivity and input overload protection.

A minimum input configuration is included in Figure 7 it

provides some filtering and necessary overload protection.

Data Squelching

During quiet periods (no signal) the data output (DO pin)

transitions randomly with noise. Most decoders can

discriminate between this random noise and actual data but

for some system it does present a problem. There are three

possible approaches to reducing this output noise:

1. Analog squelch to raise the demodulator threshold

2. Digital squelch to disable the output when data is

not present

3. Output filter to filter the (high frequency) noise

glitches on the data output pin.

The simplest solution is add analog squelch by introducing

a small offset, or squelch voltage, on the CTH pin so that

noise does not trigger the internal comparator. Usually

20mV to 30mV is sufficient, and may be achieved by

connecting a several-megohm resistor from the CTH pin to

either VSS or VDD, depending on the desired offset polarity.

Since the MICRF002 has receiver AGC noise at the

internal comparator input is always the same, set by the

AGC. The squelch offset requirement does not change as

the local noise strength changes from installation to

installation. Introducing squelch will reduce sensitivity and

also reduce range. Only introduce an amount of offset

sufficient to quiet the output. Typical squelch resistor values

range from 6.8MΩ to 10MΩ.

Wake-Up Function

The WAKEB output signal can be used to reduce system

power consumption by enabling the rest of a system when

an RF signal is present. The WAKEB is an output logic

signal which goes active low when the IC detects a

constant RF carrier. The wake-up function is unavailable

when the IC is in shutdown mode.

To activate the Wake-Up function, a received constant RF

carrier must be present for 128 counts or the internal

system clock. The internal system clock is derived from the

MICRF002/RF022

reference oscillator and is 1/256 the reference oscillator

frequency. For example:

fT = 6.4MHz

fS = fT/256 = 25kHz

PS = 1/fS = 0.04ms

128 counts x 0.04ms = 5.12ms

where:

fT = reference oscillator frequency

fS = system clock frequency

PS = system clock period

The Wake-Up counter will reset immediately after a

detected RF carrier drops. The duration of the Wake-Up

signal output is then determined by the required wake up

time plus an additional RF carrier on time interval to create

a wake up pulse output.

WAKEB Output Pulse Time = TWAKE + Additional

RF Carrier On Time

For designers who wish to use the wakeup function while

squelching the output, a positive squelching offset voltage

must be used. This simply requires that the squelch resistor

be connected to a voltage more positive than the quiescent

voltage on the CTH pin so that the data output is low in

absence of a transmission.

I/O Pin Interface Circuitry

Interface circuitry for the various I/O pins of the MICRF002

are diagrammed in Figures 1 through 6. The ESD

protection diodes at all input and output pins are not shown.

CTH Pin

VDDBB

Demodulator

Signal

2.85Vdc

PHI2B

PHI1B

CTH

VSSBB PHI2 VSSBB PHI1

Figure 2. CTH Pin

Figure 2 illustrates the CTH pin interface circuit. The CTH pin

is driven from a P-channel MOSFET source-follower with

approximately 10µA of bias. Transmission gates TG1 and

TG2 isolate the 6.9pF capacitor. Internal control signals

PHI1/PHI2 are related in a manner such that the

impedance across the transmission gates looks like a

“resistance” of approximately 100kΩ. The dc potential at

the CTH pin is approximately 1.6V

July 2008

12

M9999-070808

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