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AD7568BS

LC2MOS Octal 12-Bit DAC

Analog Devices 

AD7568

Current Mode Circuit

In the current mode circuit of Figure 17, IOUT2, and hence

IOUT1, is biased positive by an amount VBIAS. For the circuit to

operate correctly, the DAC ladder termination resistor must be

connected internally to IOUT2. This is the case with the AD7568.

The output voltage is given by:

{ ( )} VOUT =

D RFB

RDAC

V BIAS −V IN

+V BIAS

As D varies from 0 to 4095/4096, the output voltage varies from

VOUT = VBIAS to VOUT = 2 VBIAS – VIN. VBIAS should be a low

impedance source capable of sinking and sourcing all possible

variations in current at the IOUT2 terminal without any

problems.

Voltage Mode Circuit

Figure 18 shows DAC A of the AD7568 operating in the

voltage-switching mode. The reference voltage, VIN is applied to

the IOUT1 pin, IOUT2 is connected to AGND and the output volt-

age is available at the VREF terminal. In this configuration, a

positive reference voltage results in a positive output voltage

making single supply operation possible. The output from the

DAC is a voltage at a constant impedance (the DAC ladder re-

sistance). Thus, an op amp is necessary to buffer the output

voltage. The reference voltage input no longer sees a constant

input impedance, but one which varies with code. So, the volt-

age input should be driven from a low impedance source.

It is important to note that VIN is limited to low voltages be-

cause the switches in the DAC no longer have the same source-

drain voltage. As a result, their on-resistance differs and this

degrades the integral linearity of the DAC. Also, VIN must not

go negative by more than 0.3 volts or an internal diode will turn

on, causing possible damage to the device. This means that the

full-range multiplying capability of the DAC is lost.

R1

R2

VIN I OUT1 A

IOUT2 A

RFB A

DAC A

AD7568

VREF A A1

VOUT

NOTES

1) ONLY ONE DAC IS SHOWN FOR CLARITY.

2) DIGITAL INPUT CONNECTIONS ARE OMITTED.

3) C1 PHASE COMPENSATION (5–15pF) MAY BE

REQUIRED WHEN USING HIGH SPEED AMPLIFIER, A1.

Figure 18. Single Supply Voltage Switching

Mode Operation

APPLICATIONS

Programmable State Variable Filter

The AD7568 with its multiplying capability and fast settling

time is ideal for many types of signal conditioning applications.

The circuit of Figure 19 shows its use in a state variable filter

design. This type of filter has three outputs: low pass, high pass

and bandpass. The particular version shown in Figure 19 uses

one half of an AD7568 to control the critical parameters f0, Q

and A0. Instead of several fixed resistors, the circuit uses the

DAC equivalent resistances as circuit elements. Thus, R1 in

Figure 19 is controlled by the 12-bit digital word loaded to

DAC A of the AD7568. This is also the case with R2, R3 and

R4. The fixed resistor R5 is the feedback resistor, RFBB.

DAC Equivalent Resistance, REQ = (RLADDER ϫ 4096)/N

where:

RLADDER is the DAC ladder resistance.

N is the DAC Digital Code in Decimal (0 < N < 4096).

C3 10pF

VIN

VREF A

R8 30kΩ

R6

A1

10kΩ

A1

R7 30kΩ

HIGH

PASS

OUTPUT

C1 1000pF

C1 1000pF

A2

A3

I OUT1 A

I OUT1 B RFB B VREF B VREF C IOUT1 C

VREF D

IOUT1 D

DAC A

(R1)

I OUT2 A

DAC B

(R2)

1/2 x AD7568

I OUT2 B

DAC C

(R3)

I OUT2 C

DAC D

(R4)

I OUT2 D

NOTES

1. A1, A2, A3, A4: 1/4 x AD713

2. DIGITAL INPUT CONNECTIONS ARE OMITTED.

3. C3 IS A COMPENSATION CAPACITOR TO ELIMINATE

Q AND GAIN VARIATIONS CAUSED BY AMPLIFIER GAIN

BANDWIDTH LIMITATIONS.

Figure 19. Programmable 2nd Order State Variable Filter

LOW

PASS

OUTPUT

BAND

PASS

OUTPUT

REV. B

–9–

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