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MDS108 Ver la hoja de datos (PDF) - Zarlink Semiconductor Inc

Número de pieza
componentes Descripción
Fabricante
MDS108
ZARLINK
Zarlink Semiconductor Inc ZARLINK
MDS108 Datasheet PDF : 37 Pages
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MDS108
Data Sheet
Bit 4
Bit 5
Bit 6
Bit 7
EN2
Port 2: Enable; 1 = enabled
P2
Port 2: Priority; 1 = high, 0 = low
EN3
Port 3: Enable; 1 = enabled
P3
Port 3: Priority; 1 = high, 0 = low
12.14 TOSDM – TOS Discard Map
• Access: parallel interface and I2C, Read/Write
• Address: h0A
(Default 0)
(Default 0)
(Default 0)
(Default 0)
Map TOS into frame discard levels (0 = low drop, 1 = high drop).
Bit 0
Frame discard when TOS is 0
(Default 0)
Bit 1
Frame discard when TOS is 1
(Default 0)
Bit 2
Frame discard when TOS is 2
(Default 0)
Bit 3
Frame discard when TOS is 3
(Default 0)
Bit 4
Frame discard when TOS is 4
(Default 0)
Bit 5
Frame discard when TOS is 5
(Default 0)
Bit 6
Frame discard when TOS is 6
(Default 0)
Bit 7
Frame discard when TOS is 7
(Default 0)
12.15 AXSC – Transmission Scheduling Control Register
• Access: parallel interface and I2C, Read/Write
• Address: h0B
Bits [3:0]
Bit [5]
Bit [6]
Bit [7]
Transmission Queue Service Weight for high
priority queue
Global Quality of Service Enable
Global Flow Control Disable – if 1, flow control is
disabled globally; if 0, each port’s flow control
settings are separately configurable
Half Duplex Priority Enable – if 0, priority is
disabled for all half duplex ports; if 1, priority is
enabled unless AXSC[5] = 0
(Default F)
(Default 0)
(Default 0)
(Default 0)
12.16 MII_OP0 – MII Register Option 0
• Access by parallel interface and I2C, Read/Write
• Address: h0C
Permits a non-standard address for the Phy Status Register. When low and high Address
bytes are 0, the MDS108 will use the standard address.
Bit [7:0] Low order address byte
(Default 00)
19
Zarlink Semiconductor Inc.

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