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MC68CK338

32-Bit Modular Microcontroller

Freescale Semiconductor 

Freescale Semiconductor, Inc.

EXOFF — External Clock Off

0 = The CLKOUT pin is driven by the MCU system clock.

1 = The CLKOUT pin is placed in a high-impedance state.

FRZSW — Freeze Software Enable

0 = When FREEZE is asserted, the software watchdog and periodic interrupt timer counters con-

tinue to run.

1 = When FREEZE is asserted, the software watchdog and periodic interrupt timer counters are dis-

abled, preventing interrupts while the MCU is in background debug mode.

FRZBM — Freeze Bus Monitor Enable

0 = When FREEZE is asserted, the bus monitor continues to operate.

1 = When FREEZE is asserted, the bus monitor is disabled.

SLVEN — Factory Test Mode Enabled

This bit is a read-only status bit that reflects the state of DATA11 during reset.

0 = IMB is not available to an external master.

1 = An external bus master has direct access to the IMB.

SHEN[1:0] — Show Cycle Enable

This field determines what the EBI does with the external bus during internal transfer operations. A

show cycle allows internal transfers to be externally monitored. Table 8 shows whether show cycle data

is driven externally, and whether external bus arbitration can occur. To prevent bus conflict, external

peripherals must not be enabled during show cycles.

Table 8 Show Cycle Enable Bits

SHEN

00

01

10

11

Action

Show cycles disabled, external bus arbitration allowed

Show cycles enabled, external bus arbitration not allowed

Show cycles enabled, external bus arbitration allowed

Show cycles enabled, external bus arbitration allowed,

internal activity is halted by a bus grant

SUPV — Supervisor/Unrestricted Data Space

The SUPV bit places the SIML global registers in either supervisor or user data space.

0 = Registers with access controlled by the SUPV bit are accessible in either supervisor or user

data space.

1 = Registers with access controlled by the SUPV bit are accessible in supervisor data space only.

MM — Module Mapping

0 = Internal modules are addressed from $7FF000 – $7FFFFF.

1 = Internal modules are addressed from $FFF000 – $FFFFFF.

IARB[3:0] — Interrupt Arbitration Field

Each module that can generate interrupt requests has an interrupt arbitration (IARB) field. Arbitration

between interrupt requests of the same priority is performed by serial contention between IARB field bit

values. Contention must take place whenever an interrupt request is acknowledged, even when there

is only a single pending request. An IARB field must have a non-zero value for contention to take place.

If an interrupt request from a module with an IARB field value of %0000 is recognized, the CPU pro-

cesses a spurious interrupt exception. Because the SIML routes external interrupt requests to the CPU,

the SIML IARB field value is used for arbitration between internal and external interrupts of the same

priority. The reset value of IARB for the SIML is %1111, and the reset value of IARB for all other mod-

ules is %0000, which prevents SIML interrupts from being discarded during initialization.

MC68CK338

MC68CK338TS/D

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