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33991 Datasheet PDF : 36 Pages
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Freescale Semiconductor, Inc.
Table 8. RTZ Accumulator Bit Select
D3
D2
RTZ Accumulator Bits to SO Bits
ST15:ST8
0
0
0
1
[7:0]
[11:4]
1
0
[14:8]
1
1
[14:8]
RZ12–RZ5—These bits must be transmitted as logic [0] for
valid commands.
RZ4—This bit is used to enable an unconditional RTZ event.
• 0 = Automatic return to zero
• 1 = Unconditional return to zero
RZ3–RZ2—These bits are used to determine which eight
bits of the RTZ accumulator will be clocked out via the SO
pin. See Table 8.
RZ1–Return to zero—Commands the selected gauge to
return the pointer to zero position.
• 1 = Return to zero enabled
• 0 = Return to zero disabled
RZ0–Gauge Select: Gauge 0/Gauge 1—Selects the gauge
to be commanded.
• 0 = Selects Gauge 0
• 1 = Selects Gauge 1
Gauge Return to Zero Configuration Register
SI Address 101–Gauge Return to Zero Configuration
Register (RTZCR) is used to con the Return to Zero Event. See
Table 9. It is written to modify the step time, or rate, the pointer
moves during an RTZ event. Also, the integration blanking time
is adjustable with this command. Integration blanking time is the
time immediately following the transition of a coil from a driven
state to an open state in the RTZ mode. Finally, this command
is used to adjust the threshold of the RTZ integration register.
The values used for this register are chosen during
development to optimize the RTZ for each application. Various
resonance frequencies can occur due to the interaction
between the motor and the pointer. This command permits
moving the RTZ pointer speed away from these frequencies.
Bits D3:D0 determine the time spent at each full step during
an RTZ event. The step time associated with each bit
combination is illustrated in Table 10. The default full step time
is 21.25 ms (0101). If there are 2 full steps per degree of pointer
movement, the pointer speed is: 1/(FS×2) degrees.
Bit D4 determines the provided blanking time immediately
following a full step change, and before enabling the integration
of the non-driven coil signal. The blanking time is either 512 µs,
when D4 is logic [0], or 768 µs when D4 is logic [1].
Detecting pointer movement is accomplished by integrating
the back EMF present in the non-driven coil during the RTZ
event. The integration circuitry is implemented using a Sigma-
Delta converter resulting in a representative value in the 15-bit
RTZ accumulator at the end of each full step. The value in the
RTZ accumulator represents the change in flux and is
compared to a threshold. Values above the threshold indicate a
moving pointer. Values below the threshold indicate a stalled
pointer, thereby resulting in the cessation of the RTZ event.
The RTZ accumulator bits are signed and represented in
two’s complement. If the RTZR D3:D2 bits were written as 10 or
11, the ST14 bit corresponds to bit D14 of the RTZ accumulator,
the sign bit. After a full step of integration, a sign bit of 0 is the
indicator of an accumulator exceeding the decision threshold of
0, and the pointer is assumed to still be moving. Similarly, if the
sign bit is logic [1] after a full step of integration, the accumulator
value is negative and the pointer is assumed to be stopped. The
integrator and accumulator are initialized after each full step.
Accurate pointer stall detection depends on a correctly
preloaded accumulator for specific gauge, pointer, and full step
combinations. Bits D12:D5 are used to offset the initial RTZ
accumulator value, properly detecting a stalled motor. The
initial accumulator value at the start of a full step of integration
is negative. If the accumulator was correctly preloaded, a free
moving pointer will result in a positive value at the end of the
integration time. A stalled pointer results in a negative value.
The preloaded values associated with each combination of bits
D12:D5 are illustrated in Table 11. The accumulator should be
loaded with a negative value resulting in a transition of the
accumulator MSB to a logic [1] when the motor is stalled. After
a power-up, or any reset in the Default mode, the 33991device
sets the accumulator value to -1, resulting in an unconditional
RTZ pointer movement.
Table 9. RTZCR SI Register Assignment
Address 101
Write
D12
RC12
D11
RC11
D10
RC10
D9
RC9
D8
RC8
D7
RC7
D6
RC6
D5
RC5
D4
RC4
D3
RC3
D2
RC2
D1
RC1
D0
RC0
These bits are write-only.
RC12–RC5—These bits (D12:D5) determine the preloaded
value into the RTZ integration accumulator to adjust the
detection threshold. Values range from -1 (00000000) to -4081
(11111111)provided in Table 11.
RC4—This bit determines the RTZ blanking time
• 0 = 512 µs
• 1 = 768 µs
RC3–RC0—These bits (D3:D0) determine the full step time
during an RTZ event, determining the pointer moving rate. Step
times range from 4.86 ms (0000) to 62.21 ms (1111). Those are
illustrated in Table 10. The default time is 21.25 ms (0101).
MOTOROLA ANALOG INTEGRATED CIRFCoUIrTMDEoVrICeEIDnAfoTArmation On This Product,
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