MC33260DR2G Ver la hoja de datos (PDF) - ON Semiconductor

Número de pieza

componentes Descripción

Fabricante

MC33260DR2G

GreenLine™ Compact Power Factor Controller: Innovative Circuit for Cost Effective Solutions

ON Semiconductor 

MC33260

Pin Numbers are Relevant to the PDIP−8 Version

Consequently:

Ro

+

ǒVoǓregH *

IregH

Vpin1

In practice, Vpin1 is small compared to (Vo)regH and this

equation can be simplified as follows (IregH being also

replaced by its typical value 200 mA):

Ro [ 5 ǒVoǓregH (kW)

The regulation block output is connected to the Pin 2

through a 300 kW resistor. The Pin 2 voltage (Vcontrol) is

compared to the oscillator sawtooth for PWM control.

An external capacitor must be connected between Pin 2

and ground, for external loop compensation. The bandwidth

is typically set below 20 Hz so that the regulation block

output should be relatively constant over a given ac line

cycle. This integration that results in a constant on−time over

the ac line period, prevents the mains frequency output

ripple from distorting the ac line current.

where:

Vo is the output voltage,

Ro is the feedback resistor,

Vpin1 is the Pin 1 clamp voltage.

In practice, Vpin1 that is in the range of 2.5 V, is very small

compared to Vo. The equation can then be simplified by

neglecting Vpin1:

2

Icharge [ R2o

V2o

Iref

It must be noticed that the oscillator terminal (Pin 3) has

an internal capacitance (Cint) that varies versus the Pin 3

voltage. Over the oscillator swing, its average value

typically equals 15 pF (min 10 pF, max 20 pF).

The total oscillator capacitor is then the sum of the internal

and external capacitors.

Cpin3 + CT ) Cint

OSCILLATOR SECTION

The oscillator consists of three phases:

• Charge Phase: The oscillator capacitor voltage grows

up linearly from its bottom value (ground) until it

exceeds Vcontrol (regulation block output voltage). At

that moment, the PWM latch output gets low and the

oscillator discharge sequence is set.

• Discharge Phase: The oscillator capacitor is abruptly

discharged down to its valley value (0 V).

• Waiting Phase: At the end of the discharge sequence,

the oscillator voltage is maintained in a low state until

the PWM latch is set again.

Icharge = 2  Io  Io / Iref

1

0

CT

Output_Ctrl

PWM LATCH SECTION

The MC33260 operates in voltage mode: the regulation

block output (Vcontrol − Pin 2 voltage) is compared to the

oscillator sawtooth so that the gate drive signal (Pin 7) is

high until the oscillator ramp exceeds Vcontrol.

The on−time is then given by the following equation:

ton + Cpin3

Vcontrol

Ich

where:

ton is the on−time,

Cpin3 is the total oscillator capacitor (sum of the

internal and external capacitor),

Icharge is the oscillator charge current (Pin 3 current),

Vcontrol is the Pin 2 voltage (regulation block output).

Consequently, replacing Icharge by the expression given in

the Oscillator Section:

3

1

0

15 pF

R2o

ton +

Iref Cpin3

2 V2o

Vcontrol

Figure 26. Oscillator

The oscillator charge current is dependent on the feedback

current (Io). In effect

Icharge + 2

I2o

Iref

One can notice that the on−time depends on Vo

(preconverter output voltage) and that the on−time is

maximum when Vcontrol is maximum (1.5 V typically).

At a given Vo, the maximum on−time is then expressed by

the following equation:

ǒtonǓmax + Cpin3

ǒ Ǔ R2o Iref Vcontrol max

2 V2o

where:

Icharge is the oscillator charge current,

Io is the feedback current (drawn by Pin 1),

Iref is the internal reference current (200 mA).

This equation can be simplified replacing

NJ Nj 2

[(Vcontrol) max * Iref]

by Kosc

So, the oscillator charge current is linked to the output

voltage level as follows:

Refer to Electrical Characteristics, Oscillator Section.

Then:

2

Icharge +

ǒ Ǔ2

Vo * Vpin1

R2o Iref

ǒtonǓ

max

+

Cpin3

Kosc

R2o

V2o

http://onsemi.com

10

Share Link: