MB91354A Ver la hoja de datos (PDF) - Fujitsu

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MB91354A

32-Bit Proprietary Microcontroller

Fujitsu 

MB91350A Series

• CCR (Condition Code Register )

76543210

⎯⎯ S I N Z V C

CCR

Initial Value:

- - 00XXXXB

S : Stack flag. Cleared to “0” by a reset.

I : Interrupt enable flag. Cleared to “0” by a reset.

N : Negative flag. The initial value after a reset is indeterminate.

Z : Zero flag. The initial value after a reset is indeterminate.

V : Overflow flag. The initial value after a reset is indeterminate.

C : Carry flag. The initial value after a reset is indeterminate.

• SCR (System Condition code Register )

10 9 8

D1 D0 T

SCR

Initial Value:

XX0B

Flag for step dividing

Stores intermediate data for stepwise multiplication operations.

Step trace trap flag

A flag specifying whether the step trace trap function is enabled or not.

Emulator use step trace trap function. The function cannot be used by the user program when using

the emulator.

• ILM

20 19 18 17 16

ILM4 ILM3 ILM2 ILM1 ILM0

ILM

Initial Value:

01111B

This register stores the interrupt level mask value. The value in the ILM register is used as the level mask.

Initialized to “15” (01111B) by a reset.

• PC (Program Counter)

31

PC

PC

0 Initial Value:

XXXXXXXXH

The program counter contains the address of the instruction currently being executed.

The initial value after a reset is indeterminate.

27

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