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MB91110 Ver la hoja de datos (PDF) - Fujitsu

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MB91110 Datasheet PDF : 112 Pages
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MB91110 Series
N.C. Pins
N.C. pins must be opened for use.
Mode Pins (MD0 to MD2)
Those pins must be directly connected to VCC or VSS for use.
Pattern length between VCC or VSS and each mode pin on the printed-circuit board should be arranged to be as
short as possible to prevent the test mode being erroneously turned on due to noise, they should also be
connected with low impedance.
In the Event that Power Is Turned on
The RST pin must be started from “L” level when the power is turned on, and when the power is adjusted to the
VCC level it should be changed to the “H” level after being left for at least five cycles of the internal operation clock.
Original Oscillation Input in the Event that Power Is Turned on
The clock must be input until the waiting status for oscillation stability is reset in the event that power is turned on.
Hardware Standby in the Event that Power Is Turned on
Standby is not set in the event that power is turned on while the HST pin is set at “L” level. The HST pin becomes
effective after being reset, but it must first be returned to “H” level.
Power on Reset
When power is turned on, “Power on reset” must be executed. If the power voltage falls below the guaranteed
operating voltage, “Power on reset” must be executed by turning on power supply again.
Restrictions for Standby
Programs to be set for stop and sleep must be placed on the ROM in the C-bus or address area of the external
memory. If placed in the ROM address area on the I-bus, operation can not be guaranteed after returning.
Execution of Programs in I-ROM/RAM Areas
In the event that programs in the I-ROM/RAM areas are executed, enter the I-ROM/RAM areas in accordance
with the JMP system instruction. Conversely, when accessing from programs in the I-ROM/RAM area to those
in other areas, exit in accordance with the JMP system instructions.
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