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MAX522CSA Ver la hoja de datos (PDF) - Maxim Integrated

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MAX522CSA Datasheet PDF : 12 Pages
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Dual, 8-Bit, Voltage-Output
Serial DAC in 8-Pin SO Package
CS
SCLK
DIN
tCSS
tCH
tDS
tCL
tDH
tCSPWH
tCSH
Figure 3. MAX522 Detailed Serial-Interface Timing Diagram
Digital Inputs
The digital inputs are compatible with CMOS logic.
Supply current increases slightly when toggling the
logic inputs through the transition zone between
(0.3)(VDD) and (0.7)(VDD).
Microprocessor Interfacing
The MAX522 serial interface is compatible with
Microwire, SPI, and QSPI. For SPI, clear the CPOL and
CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets
the inactive clock state to zero and CPHA = 0 changes
data at the falling edge of SCLK. This setting allows SPI
to run at full clock speeds (0.5MHz). If a serial port is
not available on your µP, three bits of a parallel port can
be used to emulate a serial port by bit manipulation.
Minimize digital feedthrough at the voltage outputs by
operating the serial clock only when necessary.
Table 4. Code Table
DAC CONTENTS
B7 B6 B5 B4 B3 B2 B1 B0
ANALOG
OUTPUT
11111111
+REF
×

255
256

1 0 0 0 0 0 0 1 +REF × 122596 
10000000
+REF
×
128
256
=
+ REF
2
0 1 1 1 1 1 1 1 +REF × 122576 
00000001
00000000
+REF
×

1
256

0V
Note:
1LSB =
REF × 28
=
REF
×
1
 256 
ANALOG OUTPUT
=
REF
×
D
 256 
where D = Decimal
Value of Digital Input
10 ______________________________________________________________________________________

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