M95160-RMC6T(2014) Ver la hoja de datos (PDF) - STMicroelectronics

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Fabricante

M95160-RMC6T
(Rev.:2014)

16-Kbit serial SPI bus EEPROM with high-speed clock

STMicroelectronics 

Instructions

M95160 M95160-W M95160-R M95160-DF

6.3.4

SRWD bit

The Status Register Write Disable (SRWD) bit is operated in conjunction with the Write

Protect (W) signal. The Status Register Write Disable (SRWD) bit and Write Protect (W)

signal enable the device to be put in the Hardware Protected mode (when the Status

Register Write Disable (SRWD) bit is set to 1, and Write Protect (W) is driven low). In this

mode, the non-volatile bits of the Status Register (SRWD, BP1, BP0) become read-only bits

and the Write Status Register (WRSR) instruction is no longer accepted for execution.

Table 5. Status Register format

b7

b0

SRWD

0

0

0

BP1

BP0

WEL

WIP

Status Register Write Protect

Block Protect bits

Write Enable Latch bit

Write In Progress bit

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DocID022580 Rev 5

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