IS61C632A
READ/WRITE CYCLE SWITCHING CHARACTERISTICS (Over Operating Range)
Symbol Parameter
-4
-5
-6
-7
Min. Max. Min. Max. Min. Max. Min. Max.
tKC
Cycle Time
8 — 10 — 12 — 13 —
tKH
Clock High Time
4—
4—
4—
6—
tKL
Clock Low Time
4—
4—
4—
6—
tKQ
Clock Access Time
tKQX(2) Clock High to Output Invalid
tKQLZ(2,3) Clock High to Output Low-Z
tKQHZ(2,3) Clock High to Output High-Z
—4
1.5 —
0—
1.5 4
—5
1.5 —
0—
1.5 5
—6
2—
0—
26
—7
2—
0—
26
tOEQ Output Enable to Output Valid
tOEQX(2) Output Disable to Output Invalid
tOELZ(2,3) Output Enable to Output Low-Z
tOEHZ(2,3) Output Disable to Output High-Z
— 4.5
0—
0—
— 4.5
— 4.8
0—
0—
— 4.8
—6
0—
0—
—6
—6
0—
0—
—6
tAS
Address Setup Time
2.5 — 2.5 — 2.5 — 2.5 —
tSS
Address Status Setup Time
2.5 — 2.5 — 2.5 — 2.5 —
tWS
Write Setup Time
2.5 — 2.5 — 2.5 — 2.5 —
tCES Chip Enable Setup Time
2.5 — 2.5 — 2.5 — 2.5 —
tAH
Address Hold Time
0.5 — 0.5 — 0.5 — 0.5 —
tSH
Address Status Hold Time
0.5 — 0.5 — 0.5 — 0.5 —
tWH
Write Hold Time
0.5 — 0.5 — 0.5 — 0.5 —
tCEH Chip Enable Hold Time
0.5 — 0.5 — 0.5 —
tCFG
Configuration Setup(1)
25 — 35 — 45 —
Notes:
1. Configuration signal MODE is static and must not change during normal operation.
2. Guaranteed but not 100% tested. This parameter is periodically sampled.
3. Tested with the load in Figure 2.
0.5 —
52 —
-8
Min. Max. Unit
15 — ns
6 — ns
6 — ns
— 8 ns
2 — ns
0 — ns
2 6 ns
— 6 ns
0 — ns
0 — ns
— 6 ns
2.5 — ns
2.5 — ns
2.5 — ns
2.5 — ns
0.5 — ns
0.5 — ns
0.5 — ns
0.5 — ns
60 — ns
12
Integrated Circuit Solution Inc.
SSR001-0B