M34C02-RBN1 Ver la hoja de datos (PDF) - STMicroelectronics
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M34C02-RBN1 Datasheet PDF : 26 Pages
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M34C02
Table 16. AC Characteristics (M34C02-W, M34C02-L)
Test conditions specified in Table 10 and Table 6 or 7
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL Clock Frequency
400
kHz
tCHCL
tHIGH Clock Pulse Width High
600
ns
tCLCH
tLOW Clock Pulse Width Low
1300
ns
tDL1DL2 2
tF
SDA Fall Time
20
300
ns
tDXCX
tSU:DAT Data In Set Up Time
100
ns
tCLDX
tHD:DAT Data In Hold Time
0
ns
tCLQX
tDH
Data Out Hold Time
200
ns
tCLQV 3
tAA Clock Low to Next Data Valid (Access Time)
200
900
ns
tCHDX 1
tSU:STA Start Condition Set Up Time
600
ns
tDLCL
tHD:STA Start Condition Hold Time
600
ns
tCHDH
tSU:STO Stop Condition Set Up Time
600
ns
tDHDL
tBUF Time between Stop Condition and Next Start Condition
1300
ns
tW
tWR
Write Time
10
ms
Note: 1. For a reSTART condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
Table 17. AC Characteristics (M34C02-R, M34C02-F)
Test conditions specified in Table 10 and Table 8 or 9
Symbol
Alt.
Parameter
Min.
Max.
Unit
fC
fSCL Clock Frequency
100
kHz
tCHCL
tHIGH Clock Pulse Width High
4000
ns
tCLCH
tLOW Clock Pulse Width Low
4700
ns
tDL1DL2 2
tF
SDA Fall Time
20
300
ns
tDXCX
tSU:DAT Data In Set Up Time
250
ns
tCLDX
tHD:DAT Data In Hold Time
0
ns
tCLQX
tDH
Data Out Hold Time
200
ns
tCLQV 3
tAA Clock Low to Next Data Valid (Access Time)
200
3500
ns
tCHDX 1
tSU:STA Start Condition Set Up Time
4700
ns
tDLCL
tHD:STA Start Condition Hold Time
4000
ns
tCHDH
tSU:STO Stop Condition Set Up Time
4000
ns
tDHDL
tBUF Time between Stop Condition and Next Start Condition
4700
ns
tW
tWR
Write Time
10
ms
Note: 1. For a reSTART condition, or following a Write cycle.
2. Sampled only, not 100% tested.
3. To avoid spurious START and STOP conditions, a minimum delay is placed between SCL=1 and the falling or rising edge of SDA.
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