MH8S64BBKD-10L Ver la hoja de datos (PDF) - MITSUBISHI ELECTRIC
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MH8S64BBKD-10L Datasheet PDF : 55 Pages
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Preliminary Spec.
Some contents are subject to change without notice.
MITSUBISHI LSIs
MH8S64BBKD-10,-10L
536870912-BIT (8388608 - WORD BY 64-BIT)SynchronousDRAM
Multi Bank Interleaving READ (BL=4, CL=3)
CK
Command
A0-9
A10
A11
BA0,1
DQ
ACT
Xa
Xa
Xa
tRCD
READ ACT
Y Xb
0 Xb
Xb
READ PRE
Y
0
0
00
00 10
10 00
Qa0 Qa1 Qa2 Qa3 Qb0 Qb1 Qb2
/CAS latency
Burst Length
READ with Auto-Precharge (BL=4, CL=3)
CK
Command
A0-9
A10
A11
BA0,1
DQ
ACT
Xa
Xa
Xa
00
tRCD
READ
Y
1
00
BL + tRP
BL
ACT
tRP
Xa
Xa
Xa
00
Qa0 Qa1 Qa2 Qa3
Internal precharge begins
READ Auto-Precharge Timing (BL=4)
CK
Command
ACT
CL=3 DQ
CL=2 DQ
READ
BL
Qa0 Qa1 Qa2 Qa3
Qa0 Qa1 Qa2 Qa3
Internal Precharge Start Timing
MIT-DS-0244-0.4
MITSUBISHI
ELECTRIC
( 19 / 55 )
15/Jan./1999
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