512 Kbit Page-Mode EEPROM
SST29EE512 / SST29LE512 / SST29VE512
Data Sheet
ADDRESS A15-0
CE#
OE#
WE#
DQ6
TOEH
TCE
TOE
TWC + TBLCO
FIGURE 8: TOGGLE BIT TIMING DIAGRAM
TOES
TWO READ CYCLES
WITH SAME OUTPUTS
301 ILL F07.0
ADDRESS A14-0
DQ 7-0
CE#
5555 2AAA
Six-Byte Sequence for Disabling
Software Data Protection
5555
5555
2AAA 5555
AA
55
80
AA
55
20
TWC
OE#
WE#
TWP
SW0
TBLCO
TBLC
SW1
SW2
SW3
SW4
SW5
FIGURE 9: SOFTWARE DATA PROTECT DISABLE TIMING DIAGRAM
301 ILL F08.1
©2001 Silicon Storage Technology, Inc.
14
S71060-06-000 6/01 301