M25P128 Ver la hoja de datos (PDF) - STMicroelectronics

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M25P128

128 Mbit (Multilevel), low-voltage, Serial Flash memory with 50-MHz SPI bus interface

STMicroelectronics 

Memory organization

5

Memory organization

M25P128

The memory is organized as:

● 16777216 bytes (8 bits each)

● 64 sectors (2 Mbits, 262144 bytes each)

● 65536 pages (256 bytes each).

Each page can be individually programmed (bits are programmed from 1 to 0). The device is

Sector or Bulk Erasable (bits are erased from 0 to 1) but not Page Erasable.

Figure 7. Block diagram

HOLD

W/VPP

S

C

D

Q

Control Logic

Address Register

and Counter

High Voltage

Generator

I/O Shift Register

256 Byte

Data Buffer

Status

Register

FFFFFFh

Size of the

read-only

memory area

16/45

00000h

256 Bytes (Page Size)

X Decoder

000FFh

AI11316b

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