M24C16-FTW20I/90 Ver la hoja de datos (PDF) - STMicroelectronics
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M24C16-FTW20I/90 Datasheet PDF : 39 Pages
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DC and AC parameters
M24C16-W M24C16-R M24C16-F
Table 17. 100 kHz AC characteristics (I2C Standard mode)(1)
Symbol Alt.
Parameter
Min. Max. Unit
fC
tCHCL
tCLCH
tXH1XH2
tXL1XL2
tQL1QL2(2)
tDXCH
tCLDX
tCLQX(3)
tCLQV(4)
tCHDL(5)
tDLCL
tCHDH
tDHDL
fSCL
tHIGH
tLOW
tR
tF
tF
tSU:DAT
tHD:DAT
tDH
tAA
tSU:STA
tHD:STA
tSU:STO
tBUF
Clock frequency
Clock pulse width high
Clock pulse width low
Input signal rise time
Input signal fall time
SDA fall time
Data in setup time
Data in hold time
Data out hold time
Clock low to next data valid (access time)
Start condition setup time
Start condition hold time
Stop condition setup time
Time between Stop condition and next Start
condition
-
100
kHz
4
-
µs
4.7
-
µs
-
1
µs
-
300
ns
-
300
ns
250
-
ns
0
-
ns
200
-
ns
-
3450
ns
4.7
-
µs
4
-
µs
4
-
µs
4.7
-
µs
tW
tNS(2)
tWR Write time
-
Pulse width ignored (input filter on SCL and
SDA), single glitch
-
5
ms
-
100
ns
1. Values recommended by the I2C bus Standard-mode specification for a robust design of the I2C bus
application. Note that the M24xxx devices decode correctly faster timings as specified in Table 16: 400 kHz
AC characteristics.
2. Characterized only.
3. To avoid spurious Start and Stop conditions, a minimum delay is placed between SCL=1 and the falling or
rising edge of SDA.
4. t0C.7LQVVCiCs,thaesstuimmein(gfrothmatthRebufaslli×ngCebdugsetimofeScCoLn)srtaenqtuiisrewditbhyinththeeSvDaAluebsussplineeciftioedreiancFhigeuitrhee1r 20..3 VCC or
5. For a reStart condition, or following a Write cycle.
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DocID023494 Rev 6
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