LTC6603 Ver la hoja de datos (PDF) - Linear Technology
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LTC6603 Datasheet PDF : 24 Pages
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LTC6603
APPLICATIONS INFORMATION
than 100k. If the value of RBIAS is too large, the filters will
not receive a large enough bias current, possibly causing
errors due to insufficient settling. Be sure to obey the
absolute maximum specifications when driving a clock
into CLKIO (Pin 15).
Input Common Mode and Differential Voltage Range
The input signal range extends from zero to the V+IN
supply voltage. This input supply can be tied to V+A and
V+D, or driven up to 5.5V for increased input signal range.
Figure 9 shows the distortion of the filter versus common
mode input voltage with a 2VP-P differential input signal
(V+IN = 5V).
–60
HD3, f = 1MHz
–70
HD3, f = 200kHz
–80
RBIAS = 30.9k, VS = 3V, V+IN = 5.5V
LPF1 = 1, BW = 2.5MHz, GAIN = 24dB
VOUT = VP-P, TA = 25°C
–90
1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 5.0
COMMON MODE INPUT VOLTAGE (V)
6603 F09
Figure 9. Distortion vs Common Mode Input Voltage (5V)
For best performance, the inputs should be driven dif-
ferentially. For single ended signals, connect the unused
input to VOCM (Pin 3) or to a quiet DC reference voltage.
To achieve the best distortion performance, the input
signal should be centered around the DC voltage of the
unused input.
Refer to the Typical Performance Characteristics section
to estimate the distortion for a given input level.
Dynamic Input Impedance
The unique input sampling structure of the LTC6603
has a dynamic input impedance which depends on the
configuration and the clock frequency. This dynamic
input impedance has both a differential component and
a common mode component. The common mode input
impedance is a function of the clock frequency and the
18
control bits LPF1 and LPF0. The differential input imped-
ance is a function of the clock frequency and the control
bits LPF1, LPF0, GAIN1 and GAIN0. Table 5 shows the
typical input impedances for a clock frequency of 80MHz.
These input impedances are all proportional to 1/fCLK, so
if the clock frequency were reduced by half to 40MHz,
the impedances would be doubled. The typical variation
in dynamic input impedance for a given clock frequency
is –20% to +35%.
Table 5. Differential, Common Mode Input Impedances,
fCLK = 80MHz
Differential Common Mode
Input Impedance Input Impedance
GAIN1 GAIN0 LPF1 LPF0
(kΩ)
(kΩ)
0
0
0
0
38
40
0
0
0
1
16
20
0
0
1
0
2.5
5
0
0
1
1
2.5
5
0
1
0
0
20
40
0
1
0
1
9.5
20
0
1
1
0
2.5
5
0
1
1
1
2.5
5
1
0
0
0
10
40
1
0
0
1
5.4
20
1
0
1
0
1.9
5
1
0
1
1
1.9
5
1
1
0
0
5.2
40
1
1
0
1
2.8
20
1
1
1
0
1.6
5
1
1
1
1
1.6
5
Output Common Mode and Differential Voltage Range
The output voltage is a fully differential signal with a
common mode level equal to the voltage at VOCM. Any of
the filter outputs may be used as single-ended outputs,
although this will degrade the performance. The output
voltage range is typically 0.5V to V+A – 0.5V (V+A = 2.7V
to 3.6V).
The common mode output voltage can be adjusted by
overdriving the voltage present on VOCM. To maximize
the undistorted peak-to-peak signal swing of the filter,
the VOCM voltage should be set to V+A/2. Note that the
output common mode voltages of the two channels are
6603f
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