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LTC1983-5

100mA Regulated Charge-Pump Inverters in ThinSOT

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OPERATIO (Refer to Block Diagram)

There are many aspects of the capacitors that must be

taken into account. First, the temperature stability of the

dielectric is a main concern. For ceramic capacitors, a

three character code specifies the temperature stability

(e.g. X7R, Y5V, etc.). The first two characters represent

the temperature range that the capacitor is specified and

the third represents the absolute tolerance that the ca-

pacitor is specified to over that temperature range. The

ceramic capacitor used for the flying and output capaci-

tors should be X5R or better. Second, the voltage coef-

ficient of capacitance for the capacitor must be checked

and the actual value usually needs to be derated for the

operating voltage (the actual value has to be larger than

the value needed to take into account the loss of capaci-

tance due to voltage bias across the capacitor). Third, the

frequency characteristics need to be taken into account

because capacitance goes down as the frequency of

oscillation goes up. Typically, the manufacturers have

capacitance vs frequency curves for their products. This

curve must be referenced to be sure the capacitance will

not be too small for the application. Finally, the capacitor

ESR and ESL must be low for reasons mentioned in the

following section.

Output Ripple

Normal LTC1983 operation produces voltage ripple on the

VOUT pin. Output voltage ripple is required for the LTC1983

to regulate. Low frequency ripple exists due to the hyster-

esis in the sense comparator and propagation delays in the

charge pump enable/disable circuits. High frequency ripple

is also present mainly due to ESR of the output capacitor.

Typical output ripple under maximum load is 60mVP-P

with a low ESR 10µF output capacitor. The magnitude of

the ripple voltage depends on several factors. High input

voltage to negative output voltage differentials [(VIN +

VOUT) >1V] increase the output ripple since more charge

is delivered to COUT per clock cycle. A large flying capacitor

(>1µF) also increases ripple for the same reason. Large

output current load and/or a small output capacitor (<10µF)

LTC1983-3/LTC1983-5

results in higher ripple due to higher output voltage dV/dt.

High ESR capacitors (ESR > 0.1Ω) on the output pin cause

high frequency voltage spikes on VOUT with every clock

cycle.

There are several ways to reduce the output voltage ripple.

A larger COUT capacitor (22µF or greater) will reduce both

the low and high frequency ripple due to the lower COUT

charging and discharging dV/dt and the lower ESR typi-

cally found with higher value (larger case size) capacitors.

A low ESR ceramic output capacitor will minimize the high

frequency ripple, but will not reduce the low frequency

ripple unless a high capacitance value is chosen. A reason-

able compromise is to use a 10µF to 22µF tantalum

capacitor in parallel with a 1µF to 4.7µF ceramic capacitor

on VOUT to reduce both the low and high frequency ripple.

However, the best solution is to use 10µF to 22µF, X5R

ceramic capacitors which are available in 1206 package

sizes. An RC filter may also be used to reduce high

frequency voltage spikes (see Figure 1).

In low load or high VIN applications, smaller values for

CFLY may be used to reduce output ripple. A smaller flying

capacitor (0.01µF to 0.047µF) delivers less charge per

clock cycle to the output capacitor resulting in lower

output ripple. However, the smaller value flying caps also

reduce the maximum IOUT capability as well as efficiency.

LTC1983-X

VOUT

3.9Ω

10µF

TANTALUM

VOUT

10µF

TANTALUM

LTC1983-X

VOUT

15µF

TANTALUM

VOUT

1µF

CERAMIC

1983 F01

Figure 1. Output Ripple Reduction Techniques

1983fa

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