LTC1860LCS8 Ver la hoja de datos (PDF) - Linear Technology
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LTC1860LCS8 Datasheet PDF : 12 Pages
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LTC1860L/LTC1861L
APPLICATIO S I FOR ATIO
CONV
SDI
tCONV
SLEEP MODE
DON’T CARE
SCK
DON'T CARE
tSMPL
S/D O/S
DON’T CARE
1 2 3 4 5 6 7 8 9 10 11 12
SDO
Hi-Z
B11 B10 B9 B8 B7 B6 B5 B4 B3 B2 B1 B0*
Hi-Z
*AFTER COMPLETING THE DATA TRANSFER, IF FURTHER SCK CLOCKS ARE
APPLIED WITH CONV LOW, THE ADC WILL OUTPUT ZEROS INDEFINITELY
1860 F04
Figure 4. LTC1861L Operating Sequence
111111111111
111111111110
•
•
•
000000000001
000000000000
*VIN = (SELECTED “+†CHANNEL) –
(SELECTED “–†CHANNEL)
REFER TO TABLE 1
Figure 5. LTC1861L Transfer Curve
VIN*
1860 F05
Table 1. Multiplexer Channel Selection
SINGLE-ENDED
MUX MODE
DIFFERENTIAL
MUX MODE
MUX ADDRESS
SGL/DIFF ODD/SIGN
1
0
1
1
0
0
0
1
CHANNEL #
0
1
+
+
+
–
–
+
GND
–
–
186465 TBL1
GENERAL ANALOG CONSIDERATIONS
Grounding
The LTC1860L/LTC1861L should be used with an analog
ground plane and single point grounding techniques. Do
not use wire wrapping techniques to breadboard and
evaluate the device. To achieve the optimum performance,
use a printed circuit board. The ground pins (AGND and
DGND for the LTC1861L MSOP package and GND for the
LTC1860L and LTC1861L SO-8 package) should be tied
directly to the analog ground plane with minimum lead
length.
Bypassing
For good performance, the VCC and VREF pins must be free
of noise and ripple. Any changes in the VCC/VREF voltage
with respect to ground during the conversion cycle can
10
induce errors or noise in the output code. Bypass the VCC
and VREF pins directly to the analog ground plane with a
minimum of 1µF tantalum. Keep the bypass capacitor
leads as short as possible.
Analog Inputs
Because of the capacitive redistribution A/D conversion
techniques used, the analog inputs of the LTC1860L/
LTC1861L have capacitive switching input current spikes.
These current spikes settle quickly and do not cause a
problem if source resistances are less than 200Ω or high
speed op amps are used (e.g., the LT®1211, LT1469,
LT1807, LT1810, LT1630, LT1226 or LT1215). But if large
source resistances are used, or if slow settling op amps
drive the inputs, take care to ensure the transients caused
by the current spikes settle completely before the conver-
sion begins.
18601Lf
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